Metallic Carrier for Layer Transfer CTE Matching
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Solution Overview
Problem
Current semiconductor substrate technologies face challenges in providing a suitable base substrate with a closely matching Coefficient of Thermal Expansion (CTE) to engineered substrates, leading to issues such as thermal expansion mismatch and increased complexity in device fabrication, particularly for devices like LEDs and laser diodes.
Innovation Solution
The method involves forming a weakened zone in a donor structure to create a transfer layer and a metallic layer with a matched CTE, providing structural support and enabling the separation of a composite substrate comprising the transfer layer and metallic layer, which closely matches the CTE of the engineered substrate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If a base substrate with mismatched CTE is used for engineered substrates, then structural support is provided, but thermal strain increases during fabrication processing
Solution Approach 1:
The patent applies parameter changes by selecting metallic layers with specific CTE values that match the semiconductor layer. The metallic layer's CTE is engineered to be within 10% of the semiconductor layer's CTE, fundamentally changing the thermal expansion parameter to eliminate thermal strain during processing.
Solution Approach 2:
The patent creates a composite substrate structure consisting of a metallic layer bonded to a carrier substrate. This composite structure combines the thermal matching properties of the metal with the mechanical support of the carrier, resolving the contradiction between structural support and thermal strain.
2Ease of operation
If conventional silicon wafers are used as substrates, then handling is facilitated by thickness, but most of the substrate thickness is unused in the device structure
Solution Approach 1:
The patent segments the substrate function into two separate components: a thin semiconductor layer for device formation and a separate carrier substrate for handling. This allows the semiconductor layer to be as thin as needed for the device, eliminating waste while the carrier provides handling capability.
Solution Approach 2:
The patent extracts the handling function from the semiconductor material itself and places it on a separate carrier substrate. This allows the semiconductor layer to be optimized purely for device performance without the constraint of needing thick material for mechanical support.
3Manufacturing precision
If engineered substrates with thin semiconductor layers are used, then device fabrication precision is improved, but device complexity increases due to additional processing steps
Solution Approach 1:
The patent performs preliminary action by pre-bonding the metallic layer to the carrier substrate before transferring the semiconductor layer. This preliminary bonding creates a stable thermal match that simplifies subsequent device fabrication steps, reducing overall process complexity despite the additional initial step.
4Stability of the object's composition
If metallic layers with matched CTE are formed on donor structures, then thermal expansion mismatch is reduced, but structural support may be insufficient without adequate thickness
Solution Approach 1:
The patent uses composite materials by bonding a thin metallic layer (optimized for CTE matching) to a separate carrier substrate (optimized for mechanical strength). This composite structure achieves both thermal expansion matching and sufficient structural support without requiring the metallic layer to be thick.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces thermal strain and complexity in device fabrication, allowing for the formation of substrates with improved thermal matching and structural integrity, enhancing the yield and performance of semiconductor devices like LEDs and high power electronic devices.
Implementation Method 1
A metallic layer is formed on the attachment surface and provides a matched Coefficient of Thermal Expansion (CTE) for the metallic layer that closely matches a CTE of the transfer layer
Data Source
Figure 1
Figure 2~4C
Figure 5A~5C
AI summary
Embodiments relate to semiconductor structures and methods of forming them. In some embodiments, the methods may be used to fabricate a semiconductor substrate by forming a weakened zone in a donor structure at a predetermined depth to define a transfer layer between an attachment surface and the weakened zone and a residual donor structure between the weakened zone and a surface opposite the attachment surface. A metallic layer is formed on the attachment surface and provides an ohmic contact between the metallic layer and the transfer layer, a matched Coefficient of Thermal Expansion (CTE) for the metallic layer that closely matches a CTE of the transfer layer, and sufficient stiffness to provide structural support to the transfer layer. The transfer layer is separated from the donor structure at the weakened zone to form a composite substrate comprising the transfer layer the metallic layer.