Metallization Air-Gap Capping for Lower BEOL Capacitance
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Solution Overview
Problem
The high capacitance in metallization layers of semiconductor devices due to capping layers reducing the volume of air gaps in metal lines with denser and smaller pitches leads to significant RC delay, which is not effectively addressed by current BEOL processes.
Innovation Solution
A method involving directional deposition of dielectric materials to form cap layers on conductive features, followed by forming sacrificial features and etching back to create air gaps, with additional liners to enhance the volume of these gaps, thereby reducing capacitance and RC delay.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a capping layer is deposited on metal lines to protect them during air gap formation, then the metal lines are protected from damage, but the volume of air gaps is reduced, leading to higher capacitance and RC delay
Solution Approach 1:
The patent divides the capping layer into two distinct parts: a first capping layer that fully covers the metal lines for protection, and a second capping layer that is selectively removed from regions where air gaps will be formed. This segmentation allows the metal lines to be protected during processing while still enabling the formation of low-k air gaps in the intermetal dielectric, thereby resolving the contradiction between protection and capacitance reduction.
2Loss of energy
If air gaps are introduced in the BEOL process to reduce capacitance, then the RC delay is reduced, but the manufacturing complexity increases due to additional process steps
Solution Approach 1:
The patent performs preliminary actions by forming the first capping layer before air gap formation to protect metal lines, and then selectively removing portions of this layer to create openings for air gap formation. The sacrificial material is deposited and then removed to create the air gaps. These preliminary actions are integrated into the existing BEOL process flow, allowing air gaps to be formed without requiring completely new manufacturing equipment or processes.
3Productivity
If the pitch of metal lines is reduced to increase density, then the device integration is improved, but the air gap volume is further reduced, leading to higher capacitance
Solution Approach 1:
The patent applies local quality by selectively removing the first capping layer only in the regions where air gaps will be formed, while maintaining the capping layer coverage in other regions. This localized approach ensures that even with reduced metal line pitch, the air gaps can still form with sufficient volume to reduce capacitance, while the metal lines remain protected in areas where air gaps are not needed.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively reduces capacitance and RC delay by increasing the volume of air gaps, making it suitable for semiconductor devices with denser and smaller pitch metal lines.
Implementation Method 1
directionally depositing a dielectric material upon the first and second features at an inclined angle relative to the normal direction so as to form a cap layer on each of the first and second features
Implementation Method 2
etching back to create air gaps
Data Source
AI summary
A method for manufacturing a semiconductor device includes: forming a first feature and a second feature extending in a normal direction transverse to a substrate; directionally depositing a dielectric material upon the features at an inclined angle relative to the normal direction so as to form a cap layer including a top portion disposed on a top surface of each of the features, and two opposite wall portions extending downwardly from two opposite ends of the top portion to partially cover two opposite lateral surfaces of each of the features, respectively, the cap layer on the first feature being spaced apart from the cap layer on the second feature; forming a sacrificial feature in a recess between the features; forming a sustaining layer to cover the sacrificial feature; and removing the sacrificial feature to form an air gap.