Two Step Metallization via Bottom Barrier Removal
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Solution Overview
Problem
The formation of interconnect structures in integrated circuits using low-k dielectric layers faces challenges in reducing parasitic capacitance while maintaining effective diffusion barrier layers, as conventional methods increase contact resistance and RC delay due to thick diffusion barrier layers.
Innovation Solution
The process involves forming trenches and via openings in a low-k dielectric layer, filling with conductive material, and using a selective plating method with diffusion barrier layers, where the diffusion barrier layer is re-sputtered to ensure it is not present at the via bottom, allowing for increased thickness without compromising electrical conductivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a diffusion barrier layer is formed at the via bottom to prevent copper diffusion, then diffusion prevention is improved, but contact resistance and RC delay increase
Solution Approach 1:
The patent extracts the diffusion barrier layer from the via bottom region while maintaining it in the trench region. This is achieved by selectively removing the diffusion barrier material from via openings after trench formation, allowing copper to directly contact the via bottom for low resistance while preventing diffusion into the trench sidewalls through the remaining barrier layer
Solution Approach 2:
The patent applies different properties to different regions: the trench sidewalls retain the diffusion barrier layer for copper diffusion prevention, while the via bottoms have the barrier layer removed for low contact resistance. This local differentiation resolves the contradiction by optimizing each region for its specific function
2Reliability
If the diffusion barrier layer is made thicker to ensure effective diffusion prevention, then diffusion barrier effectiveness is improved, but manufacturing complexity and process difficulty increase
Solution Approach 1:
The patent segments the diffusion barrier layer into two distinct regions: a thicker barrier in the trench for diffusion prevention and a removed/thinner barrier at the via bottom for conductivity. This segmentation allows the barrier to be thick where needed for reliability without uniformly increasing complexity throughout the structure
Solution Approach 2:
The diffusion barrier layer is formed completely across the trench and via regions first, then selectively removed from via bottoms in a subsequent step. This preliminary formation ensures adequate barrier thickness is established before any removal, guaranteeing diffusion prevention capability is achieved before optimization for conductivity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces parasitic capacitance by eliminating diffusion barrier layers at via bottoms, thereby minimizing contact resistance and RC delay, while maintaining sufficient diffusion barrier thickness for preventing copper diffusion.
Implementation Method 1
the diffusion barrier layer is re-sputtered to ensure it is not present at the via bottom
Data Source
AI summary
An integrated circuit structure includes a first conductive line, a dielectric layer over the first conductive line, a diffusion barrier layer in the dielectric layer, and a second conductive line in the dielectric layer. The second conductive line includes a first portion of the diffusion barrier layer. A via is underlying the second conductive line and electrically couples the second conductive line to the first conductive line. The via includes a second portion of the diffusion barrier layer, with the second portion of the diffusion barrier layer having a bottom end higher than a bottom surface of the via.