Metallization Island Coupling for Boiling-Enhanced IC Cooling

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Solution Overview

Problem

Existing semiconductor IC devices face challenges with heat dissipation due to the use of thermal interface materials and metallic lid structures, which introduce additional thermal resistance and can lead to substrate warpage, affecting device performance and lifespan.

Innovation Solution

A direct boiling enhanced layer (BEL) is implemented directly on the substrate without a thermal interface material or metallic lid, configured as discrete islands aligned with thermal hot spots to facilitate efficient heat dissipation and reduce warpage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a thermal interface material and metallic lid structure are used to attach the BEL to IC devices, then the BEL can be securely attached to facilitate heat removal, but additional thermal resistance is introduced which reduces cooling efficiency

Engineering Contradiction:
Improveattachment reliabilityVSAvoidthermal resistance
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent removes the thermal interface material and metallic lid structure from the assembly, achieving direct attachment of the BEL to the IC device. This extraction eliminates the additional thermal resistance layers while maintaining secure attachment through the BEL's direct contact with the device surface.

Inventive Principle:
Principle #2Taking out (Extraction)

2Reliability

If a BEL is attached through thermal interface material and metallic lid structure, then the BEL can be secured to the IC devices, but substrate warpage increases which is undesirable

Engineering Contradiction:
ImproveBEL attachmentVSAvoidsubstrate warpage
Core Design Contradiction:
ReliabilityVSShape

Solution Approach 1:

By removing the thermal interface material and metallic lid structure, the patent eliminates the sources that cause substrate warpage. The direct attachment of the BEL to the IC device prevents the warping issues associated with multiple intermediate layers and their thermal expansion differences.

Inventive Principle:
Principle #2Taking out (Extraction)

3Reliability

If thermal interface material and metallic lid structure are used, then the BEL can be attached to IC devices, but device complexity increases

Engineering Contradiction:
ImproveBEL attachmentVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent simplifies the device structure by extracting and removing the thermal interface material and metallic lid structure. This leaves only the essential BEL component directly attached to the IC device, significantly reducing structural complexity while maintaining the heat removal function.

Inventive Principle:
Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution reduces overall thermal resistance and minimizes substrate warpage, enhancing IC device performance and lifespan by quickly dissipating heat through vapor formation and transfer.

Implementation Method 1

The metal-containing layer is configured to facilitate a transformation of a cooling fluid into vapor in response to heat generated by the IC devices

Methodology Applied
Scientific EffectBoiling: Boiling

Implementation Method 2

heat generated by the IC devices may cause the cooling fluid to transform into a vapor, which rises and comes into contact with the condenser

Methodology Applied
Scientific EffectHeat conduction: Conduction (thermal)

Data Source

PatentUS20250349540A1Metallization structure for coupling boiling enhanced layer to substrate in a cooling system
Publication Date: 2025.11.13 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250349540A1 patent drawing
  • US20250349540A1 patent drawing
  • US20250349540A1 patent drawing

AI summary

A metallization structure is formed over an integrated circuit (IC) substrate from a first side. A patterning process is performed to the metallization structure from the first side. The metallization structure is patterned into a plurality of metallization islands by the patterning process. A plurality of metal-containing structures is formed over the plurality of the metallization islands, respectively, from the first side. A second side of the IC substrate is coupled to an organic substrate. The second side is opposite the first side.