Metallization Layer Sandwich Structure for Power Semiconductor Cracking
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Solution Overview
Problem
The recrystallization of NiP layers during thermal treatments in power semiconductor devices leads to cracking and distortion of the metallization layer, causing reliability issues and preventing effective bonding, as the shrinking NiP layer can no longer support the high power currents and mechanical stress.
Innovation Solution
A sandwich structure metallization layer is introduced, comprising a WTi barrier layer with embedded stabilization layers of NiP or alternative materials like NiMoP, which distributes stress uniformly and prevents cracking, ensuring the metallization layer's integrity and bonding capabilities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a NiP layer is applied to prevent interdiffusion and provide mechanical support, then the metallization layer gains protection and bonding capability, but the NiP layer recrystallizes during thermal treatment causing cracking and distortion
Solution Approach 1:
The patent applies a composite metallization structure consisting of multiple layers with different materials and properties. The Cu layer provides electrical conductivity, the NiP layer provides mechanical strength and bonding capability, and the stabilization layer (NiMoP or Ni with specific crystal structure) prevents recrystallization and cracking. This composite approach allows each layer to contribute its advantageous properties while compensating for the weaknesses of individual materials.
Solution Approach 2:
The patent modifies the chemical composition and crystal structure parameters of the NiP layer by adding stabilizing elements (Mo, B) or controlling the crystal orientation. This changes the material parameters to prevent harmful recrystallization during thermal treatment while maintaining the necessary mechanical properties for bonding and current conduction.
2Strength
If the NiP layer is made hard to prevent needle penetration and support bonding forces, then mechanical protection is improved, but the high elasticity module causes wafer distortion during thermal processing
Solution Approach 1:
The patent changes the material parameters of the NiP layer by adding alloying elements (Mo, B) or controlling the crystal structure to reduce the elasticity module while maintaining adequate mechanical strength. This allows the layer to remain protective during bonding but become more compliant during thermal processing to avoid wafer distortion.
Solution Approach 2:
The patent creates different local properties within the NiP layer by controlling crystal orientation or adding stabilizing elements at specific locations. The layer maintains high strength where mechanical protection is needed but has reduced elasticity in regions where thermal expansion compensation is required, allowing localized adaptation to different functional requirements.
3Stability of the object's composition
If the NiP layer shrinks during recrystallization to increase density, then material stability is improved, but cracks are generated in large structures and corners
Solution Approach 1:
The patent modifies the recrystallization parameters of the NiP layer by adding stabilizing elements or controlling the crystal structure to achieve density increase without the harmful shrinkage effect. This allows the material to become more stable and dense while maintaining structural integrity and avoiding crack formation in large structures and corners.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The sandwich structure effectively prevents cracking and distortion during thermal processing, maintaining the integrity of the metallization layer and enabling reliable high-power current conduction while allowing for stress distribution and improved bonding processes.
Implementation Method 1
a WTi barrier layer, on which a first copper layer is arranged
Implementation Method 2
stabilization layers of NiP or alternative materials like NiMoP, which distributes stress uniformly and prevents cracking
Implementation Method 3
ensuring the metallization layer's integrity and bonding capabilities... prevents distortion of the wafer disk
Data Source
AI summary
A power semiconductor IC device is disclosed. In one embodiment, the device includes a substrate, and a layer structure formed on the substrate. The layer structure includes a metallization layer including copper, wherein the metallization layer is formed as a stack structure including at least two copper layers and a stabilization layer between the two copper layers.


