Metallized FinFET Junctions for Reduced Access Resistance
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
FinFET devices face high access resistance due to reduced metal contact area with source/drain junctions, exacerbated by the current path including the entire spacer region and fin height, leading to performance issues as device pitch scales down.
Innovation Solution
A fabrication method involving the formation of parallel semiconductor fins with unmerged epitaxial source/drain structures, selective removal of fin portions to create cavities, and deposition of metal within these cavities and on source/drain structures to form metal silicide regions, increasing contact area and reducing resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If device pitch is scaled down to reduce transistor size, then device density is improved, but metal contact area to source/drain junctions is reduced resulting in high access resistance
Solution Approach 1:
The patent introduces a vertical cavity structure beneath the source/drain junctions, transforming the contact geometry from a two-dimensional surface contact to a three-dimensional volumetric contact. The metal fills the cavity and extends upward to contact the source/drain junction, creating a multi-level contact architecture that increases effective contact area without increasing lateral footprint, thus maintaining high device density while reducing access resistance.
Solution Approach 2:
The metal contact structure is nested within the cavity formed beneath the source/drain junctions. The cavity itself is nested within the semiconductor structure, creating a hierarchical arrangement where the metal contact is contained within the cavity which is contained within the overall device structure. This nested configuration maximizes contact area within the available vertical space.
2Length of moving object
If metal contact length is reduced to fit smaller devices, then device pitch is improved, but access resistance increases due to limited contact area
Solution Approach 1:
Instead of increasing horizontal contact length (which would increase device pitch), the patent extends the contact vertically into the cavity and upward to contact the source/drain junction. This vertical extension provides additional contact area without increasing the lateral dimensions, thus maintaining small device pitch while reducing access resistance through increased contact area in the vertical dimension.
Solution Approach 2:
The contact structure is segmented into multiple regions: metal filling the cavity, metal extending upward to contact the source/drain junction, and metal forming silicide regions. This segmentation allows the contact function to be distributed across multiple discrete metal regions, each contributing to the overall contact area and current path, thereby reducing total access resistance without increasing lateral contact length.
3Stability of the object's composition
If current path includes entire spacer region and fin height, then device structure is maintained, but access resistance is exacerbated
Solution Approach 1:
The patent extracts the high-resistance portion of the current path by removing fin portions to create cavities. By taking out these fin sections, the current path is shortened and redirected through the low-resistance metal fill in the cavity, bypassing the high-resistance spacer region and reducing overall access resistance while maintaining the essential FinFET structure.
Solution Approach 2:
The metal fill in the cavity acts as an intermediary conductive path between the substrate and the source/drain junction. Instead of current flowing through the high-resistance spacer and entire fin height, the metal intermediary provides a low-resistance parallel path, significantly reducing access resistance while the FinFET active channel structure remains intact.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method significantly increases contact area and reduces contact and access resistance, facilitating nanometer-scale device fabrication nodes and improving FinFET performance.
Implementation Method 1
Metal is deposited within the cavities and on the source/drain structures
Implementation Method 2
Doped semiconductor material such as silicon germanium (SiGe) may be provided by selective epitaxial growth on the sidewalls of the fin structure(s) during fabrication of FinFETs
Data Source
AI summary
FinFET devices are provided wherein the current path is minimized and mostly limited to spacer regions before the channel carriers reach the metal contacts. The fins in the source/drain regions are metallized to increase the contact area and reduce contact resistance. Selective removal of semiconductor fins in the source/drain regions following source/drain epitaxy facilitates replacement thereof by the metallized fins. A spacer formed subsequent to source/drain epitaxy prevents the etching of extension/channel regions during semiconductor fin removal.