Metallized Via-Holed Ceramic Substrate via Segmented Firing
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Solution Overview
Problem
Existing methods for manufacturing metallized via-holed ceramic substrates face challenges such as uneven shape changes, void formation, and reduced conductivity due to shrinkage issues, especially when using high-melting-point metals and complex manufacturing processes like sputtering and electroplating, which complicate the production of precise wiring patterns and lead to issues like mold resin leakage and solder rise during LED mounting.
Innovation Solution
A method involving a sintered ceramic substrate with electroconductive vias filled with metals having melting points between 600°C to 1100°C, along with higher melting point metals and active metals, forming a dense and conductive structure through a multi-layer metal paste application and firing process, followed by plating and etching to create a precise wiring pattern, which enhances adhesion and conductivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the co-firing method is used to manufacture metallized via-holed ceramic substrates, then the green sheet and metal paste are fired simultaneously to form the substrate, but the green sheet shrinks unevenly during firing causing the substrate to deform into a star shape and the shape of patterns and position of vias change depending on location
Solution Approach 1:
The manufacturing process is divided into two separate stages: first forming the green sheet with via holes, then separately forming and filling the metal paste into the holes. This segmentation allows the green sheet to be fired without metal paste present, eliminating the uneven shrinkage problem that occurs when both are fired simultaneously together.
2Ease of manufacture
If the co-firing method is used, then the green sheet and metal paste are fired simultaneously at high temperature, but high-melting-point metals like molybdenum and tungsten must be used which have poor electroconductivity
Solution Approach 1:
The via holes are formed and the green sheet is prepared in advance before the metal paste is introduced. This preliminary preparation allows the use of low-melting-point, high-conductivity metals like copper and silver in the paste, which can be filled into the pre-formed holes and then sintered at appropriate temperatures without requiring high-melting-point metals.
3Manufacturing precision
If the post-firing method is used to form metal paste layer on sintered substrate, then the pattern shape does not change depending on location, but the metal paste shrinks in the through-hole upon sintering causing voids and making it difficult to form a dense via
Solution Approach 1:
The composition and physical properties of the metal paste are optimized to control its shrinkage behavior during sintering. By adjusting paste formulation, particle size distribution, and organic vehicle content, the paste maintains adequate flowability to fill voids while achieving sufficient green strength to prevent excessive shrinkage and void formation in the final sintered via.
4Reliability
If sputtering and copper electroplating are used to fill through-holes, then the wiring pattern and electroconductive via are formed, but the process requires complex manufacturing facilities and more time is needed for filling if the through-hole diameter or substrate thickness is large
Solution Approach 1:
The complex sputtering and electroplating process is replaced with a simpler screen printing or dispensing method to apply metal paste, followed by a single sintering step. This mechanical substitution eliminates the need for vacuum sputtering equipment and electroplating facilities, reducing manufacturing complexity while achieving adequate via filling and conductivity.
5Reliability
If sputtering and electroplating are used to fill through-holes, then the wiring pattern is formed, but the thickness of the wiring pattern and layer thickness of the resist pattern must increase, making it difficult to attain high precision of the pattern
Solution Approach 1:
The metal paste is applied in a controlled amount that is sufficient to fill the via holes and form the necessary conductive pathways, but not excessive enough to create thick wiring patterns. This partial action approach, combined with precise paste formulation and application control, achieves the required conductivity with minimal pattern thickness, maintaining high precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the simple and precise manufacturing of metallized via-holed ceramic substrates with improved conductivity and reduced voids, enabling the formation of dense electroconductive vias and precise wiring patterns, suitable for high-power devices like high-output LEDs, while avoiding the limitations of previous methods.
Implementation Method 1
a method involving a sintered ceramic substrate with electroconductive vias filled with metals having melting points between 600°C to 1100°C, along with higher melting point metals and active metals, forming a dense and conductive via structure through a multi-layer metal paste approach, followed by firing and plating
Implementation Method 2
an active layer formed in the interface between the electroconductive via and the sintered ceramic substrate
Data Source
AI summary
The present invention provides a metallized via-holed ceramic substrate having (1) a sintered ceramic substrate, (2) an electroconductive via formed in the sintered ceramic substrate, having an electroconductive metal closely filled in a through-hole of the sintered ceramic substrate, wherein the electroconductive metal contains a metal (A) with melting point of 600° C. to 1100° C., a metal (B) with higher melting point than the metal (A), and an active metal, (3) a wiring pattern on at least one face of the sintered ceramics substrate, having an electroconductive surface layer and a plating layer thereon, wherein the electroconductive surface layer consists of an electroconductive metal containing the metal (A), the metal (B), and an active metal, (4) an active layer formed in the interface between the electroconductive via and the sintered ceramic substrate, and (5) an active layer formed in the interface between the electroconductive surface layer and the sintered ceramic substrate.


