Out-of-order processor MFI mechanism deadlock prevention

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Solution Overview

Problem

Out-of-order (OOO) processors face significant performance penalties due to lockup conditions that prevent instructions from issuing, as existing hang buster mechanisms require a high threshold of processor cycles to flush processing queues, leading to prolonged disruption in parallel and out-of-order execution.

Innovation Solution

The introduction of a Most Favored Instruction (MFI) mechanism that designates a critical instruction for priority processing, transmitted via the Itag bus, allowing for efficient communication and ensuring uninterrupted progress even when other instructions are stuck, thereby preventing deadlocks and livelocks with minimal overhead.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the hang buster uses a high threshold value (e.g., 30,000 processor cycles) to flush processing queues, then false positives are avoided and normal execution is maintained, but the resolution time for lockup conditions becomes excessively long and performance penalty increases

Engineering Contradiction:
Improveavoidance of false positives in hang busterVSAvoidresolution time for lockup conditions
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent segments the processing queue into multiple parts: a dedicated MFI slot and regular instruction slots. This segmentation allows the system to track and prioritize specific critical instructions without flushing the entire queue, enabling timely resolution of lockup conditions while maintaining overall queue integrity and avoiding false positives.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The MFI mechanism performs preliminary action by pre-designating a most favored instruction slot before lockup conditions occur. This pre-positioned slot is specifically prepared to receive and process critical instructions that may cause deadlocks, allowing the system to proactively prevent lockup conditions rather than reactively flushing queues after thresholds are exceeded.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If processing queues are flushed to resolve lockup conditions, then deadlock is eliminated and execution can continue, but all benefits of parallel processing and out-of-order execution are momentarily lost and queue reload time increases

Engineering Contradiction:
Improveelimination of deadlock conditionsVSAvoidparallel processing efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent extracts the critical MFI from the regular instruction stream and places it in a dedicated MFI slot within the processing queue. This extraction allows the critical instruction to be separately tracked and prioritized without requiring flush operations on the entire queue, thereby eliminating deadlocks while preserving parallel processing benefits for other instructions.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies local quality by giving the MFI slot special properties different from regular instruction slots. The MFI slot has priority processing rights and can be independently managed, allowing localized resolution of deadlock conditions without affecting the processing quality and efficiency of other instructions in the queue.

Inventive Principle:
Principle #3Local quality

3Productivity

If multiple instructions are processed in parallel in processing queues, then execution efficiency is improved, but the complexity of tracking dependencies and preventing deadlocks increases

Engineering Contradiction:
Improveinstruction processing throughputVSAvoiddeadlock prevention mechanism complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The MFI mechanism performs preliminary action by pre-designating a most favored instruction slot before lockup conditions occur. This pre-positioned slot is specifically prepared to receive and process critical instructions that may cause deadlocks, allowing the system to proactively prevent lockup conditions rather than reactively flushing queues after thresholds are exceeded.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The MFI slot acts as an intermediary between the instruction fetch unit and the processing units. It mediates the flow of critical instructions, providing a buffer and priority mechanism that simplifies dependency tracking and deadlock prevention without requiring complex interconnections between all processing components.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS10169046B2Out-of-order processor that avoids deadlock in processing queues by designating a most favored instruction
Publication Date: 2019.01.01 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US10169046B2 patent drawing
  • US10169046B2 patent drawing
  • US10169046B2 patent drawing

AI summary

An instruction sequencing unit in an out-of-order (OOO) processor includes a Most Favored Instruction (MFI) mechanism that designates an instruction as an MFI. The processing queues in the processor identify when they contain the MFI, and assures processing the MFI. The MFI remains the MFI until it is completed or is flushed, and which time the MFI mechanism selects the next MFI.