MHL Receiver Common-Mode Compensation for Clock Swing
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Solution Overview
Problem
The transmission of multiple signals over a limited number of conductors, such as in the MHL protocol, can result in excessive common mode signal swing, causing performance issues for receiver circuits due to large gain variation and voltage swings, particularly in submicron processes.
Innovation Solution
A common mode compensation circuit that senses the common mode signal, amplifies it with a negative gain, and feeds back the amplified signal to counteract the voltage swing, maintaining the differential signal gain while reducing the common mode voltage swing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple signals are transmitted over a limited number of conductors, then conductor usage efficiency is improved, but common mode voltage swing increases causing receiver performance degradation
Solution Approach 1:
The patent segments the signal processing into two independent paths: a differential mode path for data signals and a common mode path for clock signals. This is achieved through separate amplifier circuits - a differential amplifier for the differential data signals and a common mode amplifier for the common mode clock signals. By processing these signal types separately, the system maintains conductor usage efficiency while preventing common mode voltage swing from degrading receiver performance.
Solution Approach 2:
The patent introduces a common mode amplifier as an intermediary component between the receiver input and the differential amplifier. This intermediary circuit specifically targets and amplifies only the common mode clock signal component, isolating it from the differential data signal path. This mediation prevents the common mode voltage swing from directly affecting the differential signal reception, thereby maintaining both conductor efficiency and receiver performance.
2Reliability
If common mode signal swing is reduced to improve receiver performance, then signal integrity is improved, but circuit complexity increases
Solution Approach 1:
The patent applies local quality by designing the common mode amplifier with specific characteristics tailored for common mode signal processing only. The amplifier is configured with particular gain settings and frequency responses optimized for the clock signal bandwidth. This localized optimization improves signal integrity for the common mode component without unnecessarily complicating the entire receiver circuit, as each part of the circuit is precisely tuned for its specific function.
Solution Approach 2:
The patent implements dynamic adaptability through programmable gain amplifiers and adjustable equalization circuits that can be configured based on the specific signal conditions and channel characteristics. This dynamic capability allows the receiver to optimize performance for different common mode voltage swing conditions without requiring multiple fixed circuits, thereby improving signal integrity while controlling overall circuit complexity through software-configurable parameters.
Data Source
AI summary
Embodiments of the invention are generally directed to compensation for common mode signal swing. An embodiment of an apparatus includes a connector for the transfer of the data, the connector including connections for a first set of one or more conductors; a receiver for the reception of data via the connector, the received data including a first signal and a second signal transmitted via the set of one or more conductors, the second signal being a common mode signal modulating the first signal, the receiver including an amplifier to amplify the received data with a positive gain; and a common mode compensation circuit to compensate for a voltage swing of the common mode signal in the amplified received data. The common mode compensation circuit is to sense the common mode signal, amplify the sensed common mode signal with a negative gain, and feed back the amplified common mode to output nodes of the receiver.


