MIA-Aware Detailed Placement Clustering for VLSI

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Solution Overview

Problem

Modern VLSI designs face challenges in simultaneously optimizing timing and power consumption due to the minimum implant area (MIA) constraint, which can lead to violations in implant areas for low and high threshold voltage cells, affecting circuit performance and power efficiency.

Innovation Solution

The solution involves a minimum-implant-area aware detailed placement flow that clusters violation cells with the same threshold voltage to form larger implant areas, using a combination of global and network-flow-based clustering and declustering operations, along with design compaction techniques to ensure compliance with MIA constraints and minimize wire-length.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If LVT cells are used on critical paths to improve timing, then circuit performance is improved, but implant area may become smaller than MIA constraint

Engineering Contradiction:

Improvecircuit performanceVSAvoidimplant area

Core Design Contradiction:

SpeedVSArea of moving object

Solution Approach 1:

The patent merges adjacent violation cells (cells with implant areas below MIA constraint) into clusters. By grouping these cells together, the combined implant area of the cluster satisfies the MIA constraint while allowing individual cells to maintain their small sizes for performance optimization. This resolving process clusters violation cells and then places them to ensure cluster implant areas meet minimum requirements.

Inventive Principle:

Principle #5Merging (Combining)

2Loss of energy

If HVT cells are used on non-critical paths to suppress leakage power, then power efficiency is improved, but implant area may become smaller than MIA constraint

Engineering Contradiction:

Improveleakage powerVSAvoidimplant area

Core Design Contradiction:

Loss of energyVSArea of moving object

Solution Approach 1:

Inventive Principle:

Principle #5Merging (Combining)

3Adaptability or versatility

If multiple Vt cells are used to balance timing and power, then design flexibility is improved, but MIA violations occur

Engineering Contradiction:

Improvedesign flexibilityVSAvoidMIA constraint compliance

Core Design Contradiction:

Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The patent segments the placement problem into two levels: cell-level placement and cluster-level placement. Violation cells are identified and grouped into clusters, which are then placed as units. This segmentation allows the design to maintain flexibility in cell selection while ensuring manufacturing compliance at the cluster level through controlled placement strategies.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Inventive Principle:

Principle #5Merging (Combining)

4Manufacturing precision

If design rules are restricted due to minimum feature sizes, then manufacturing precision is improved, but device complexity increases

Engineering Contradiction:

Improveminimum feature size controlVSAvoidplacement complexity

Core Design Contradiction:

Manufacturing precisionVSDevice complexity

Solution Approach 1:

Inventive Principle:

Principle #1Segmentation

Data Source

PatentUS9940424B2Systems and methods for minimum-implant-area aware detailed placement

Publication Date: 2018.04.10 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

The present disclosure is directed to systems and methods for a minimum-implant-area (MIA) aware detailed placement. In embodiments, the present disclosure clusters a violation cell with the cells having a same threshold voltage (Vt) and determines an optimal region for a cluster to minimize the wire-length. In further embodiments, an MIA-aware cell flipping technique minimizes a design area while satisfying the MIA constraint.