Micro-bump RF Signal Tuning for ESD Parasitic Capacitance

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional ESD protection circuits in integrated circuits (ICs) suffer from high parasitic capacitance, which degrades device performance and increases noise at high frequencies, particularly in radio-frequency applications, due to large MOS transistors and increased capacitance values.

Innovation Solution

A novel package structure utilizing micro-bumps as part of a filter, where micro-bumps are used to couple signals and adjust inductance to counteract parasitic capacitance, allowing for tuning of electrical performance and reducing noise coupling by acting as equivalent inductors and filters for high-frequency signals.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional ESD protection circuits use large MOS transistors to achieve sufficient ESD protection, then ESD protection capability is improved, but parasitic capacitance increases significantly

Engineering Contradiction:
ImproveESD protection capabilityVSAvoidparasitic capacitance
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The ESD protection circuit is divided into multiple smaller transistor units (e.g., five 10-mil transistors) instead of using a single large transistor. This segmentation reduces the total parasitic capacitance while maintaining equivalent ESD protection capability, as each small transistor contributes less capacitance and the combined effect provides sufficient protection.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies different transistor sizes in different locations within the ESD protection circuit. Smaller transistors are used where low capacitance is critical (near RF signal paths), while larger transistors can be used in other areas where ESD protection is needed but capacitance impact is less critical. This localized approach optimizes the balance between protection and performance.

Inventive Principle:
Principle #3Local quality

2Reliability

If drain extension is increased to enhance ESD protection, then ESD voltage handling is improved, but parasitic capacitance CESD increases

Engineering Contradiction:
ImproveESD voltage handlingVSAvoidparasitic capacitance CESD
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent changes the physical parameters of the transistor, specifically reducing the drain extension length to 1-2 times the minimum drain width instead of the conventional 2-3 times or more. This parameter change reduces the parasitic capacitance while maintaining sufficient ESD protection through the use of multiple smaller transistor units arranged in parallel.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If parasitic capacitance CESD is increased to improve ESD protection, then ESD robustness is improved, but noise coupling to transceiver increases

Engineering Contradiction:
ImproveESD robustnessVSAvoidnoise coupling
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

By segmenting the ESD protection into multiple small transistors, the total parasitic capacitance is reduced, which directly reduces the noise coupling to the transceiver. Each small transistor contributes minimal capacitance, and when combined in parallel, they provide both ESD robustness and low noise coupling, solving the contradiction between reliability and noise generation.

Inventive Principle:
Principle #1Segmentation

4Reliability

If large MOS transistors are used in ESD protection circuits, then ESD protection is achieved, but high-frequency signal transmission is degraded

Engineering Contradiction:
ImproveESD protectionVSAvoidhigh-frequency signal transmission
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The use of multiple small transistors instead of a single large transistor reduces the total parasitic capacitance, which improves the high-frequency signal transmission by reducing the capacitive loading effect. The segmented structure allows RF signals to pass through with less attenuation and phase distortion while maintaining ESD protection capability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Changing the transistor size parameters to smaller dimensions reduces the parasitic capacitance and inductance, improving the frequency response and signal transmission characteristics. This parameter optimization allows the ESD protection circuit to operate effectively at high frequencies without degrading signal integrity.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The use of micro-bumps effectively reduces parasitic capacitance effects, maintaining signal integrity and frequency performance without degrading high-frequency signal transmission, thereby enhancing the operational efficiency of RF devices like wireless transceivers.

Implementation Method 1

micro-bumps are used to couple signals and adjust inductance to counteract parasitic capacitance, allowing for tuning of electrical performance

Methodology Applied
Scientific EffectInductance: Inductor

Implementation Method 2

micro-bumps... acting as equivalent inductors and filters for high-frequency signals

Methodology Applied
Scientific EffectElectromagnetic filtering: Filter (electronic)

Data Source

PatentUS8901752B2Tuning the efficiency in the transmission of radio-frequency signals using micro-bumps
Publication Date: 2014.12.02 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US8901752B2 patent drawing
  • US8901752B2 patent drawing
  • US8901752B2 patent drawing

AI summary

A device includes a die including a main circuit and a first pad coupled to the main circuit. A work piece including a second pad is bonded to the die. A first plurality of micro-bumps is electrically coupled in series between the first and the second pads. Each of the plurality of micro-bumps includes a first end joining the die and a second end joining the work piece. A micro-bump is bonded to the die and the work piece. The second pad is electrically coupled to the micro-bump.