Direct 3D Chip Testing via Micro-C4 Interface

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Solution Overview

Problem

Conventional methods for testing three-dimensional semiconductor packages with micro-solder connections are limited by the inability to directly test individual dies due to the small pitch of micro-solder connections, requiring the use of testing interposers that add process steps and risk damage to the dies.

Innovation Solution

Forming unique patterns of micro-solder connections on IC chips with a pitch of approximately 62 μm, allowing direct electrical testing using novel electrical probe tips with multiple contact points aligned on a 62 μm pitch, eliminating the need for testing interposers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional testing methods are used with micro-solder connections having small pitch, then testing capability is limited, but using testing interposers increases device complexity and risk of damage

Engineering Contradiction:
Improvetesting capabilityVSAvoidtesting interposer structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The invention extracts the testing function from the complex interposer structure and integrates it directly into the probe tip. By placing multiple contact points on a single probe tip, the need for a separate testing interposer is eliminated, reducing device complexity while maintaining testing capability

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The invention merges multiple contact points onto a single probe tip, combining what would traditionally require separate interposer components. This integration allows direct testing of micro-solder connections with small pitch without the complexity of testing interposers

Inventive Principle:
Principle #5Merging (Combining)

2Ease of operation

If testing interposers are used to test individual dies, then testing can be performed, but process steps increase and damage risk to dies increases

Engineering Contradiction:
Improvetesting processVSAvoidprocess steps
Core Design Contradiction:
Ease of operationVSLoss of time

Solution Approach 1:

The invention performs preliminary action by forming the pattern of micro-solder connections on the die surface before final packaging. This allows testing to be conducted directly on the die without requiring additional testing interposer steps, reducing process complexity and time

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The invention removes the testing interposer from the process entirely by integrating testing capability directly into the probe tip design, eliminating unnecessary process steps and reducing the risk of die damage

Inventive Principle:
Principle #2Taking out (Extraction)

3Ease of operation

If micro-solder connections with 62 μm pitch are formed, then direct testing becomes possible, but manufacturing precision requirements increase

Engineering Contradiction:
Improvedirect testing capabilityVSAvoidmicro-solder connection pitch
Core Design Contradiction:
Ease of operationVSManufacturing precision

Solution Approach 1:

The invention changes the parameter of contact point pitch on the probe tip to match the 62 μm pitch of micro-solder connections. This parameter alignment enables direct testing while the precision requirements are managed through coordinated design of both the micro-solder connections and probe tip contact points

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables direct and efficient electrical testing of micro-solder connections without interposers, reducing costs and minimizing damage to dies, while allowing for early detection of errors in the fabrication process.

Implementation Method 1

forming a through substrate via (TSV) through an entire thickness of an integrated circuit (IC) chip, the TSV may electrically connect a first surface of the IC chip to a second surface on an opposite side of the IC chip

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 2

the pattern of micro-solder connections may allow the IC chip to be electrically tested by directly contacting the micro-solder connections with an electrical probe tip

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentUS11193953B23D chip testing through micro-C4 interface
Publication Date: 2021.12.07 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US11193953B2 patent drawing
  • US11193953B2 patent drawing
  • US11193953B2 patent drawing

AI summary

Structures and methods for directly testing a semiconductor wafer having micro-solder connections. According to one embodiment, a method forms a pattern of micro-solder connections coupled with a through substrate via (TSV) that can be directly tested by electrical probing, without the use of a testing interposer. According to another embodiment, a method tests the pattern of micro-solder connections. According to another embodiment, a novel electrical probe tip structure has contacts on the same pitch as the pattern of micro-solder connections.