Micro-element Package With Dual-Thickness Substrate
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current image sensor module manufacturing methods, such as the Chip On Board (COB) method, result in increased manufacturing costs, limited miniaturization, and susceptibility to particle contamination, which hinders mass production and productivity.
Innovation Solution
A micro-element package design featuring a substrate with a micro-element on its surface and a thin surrounding portion, where a circuit board is electrically connected using a via hole and solder bump, and a transparent cover forms a sealed air cavity to prevent contamination, allowing for reduced module height and simplified manufacturing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of stationary object
If COB method is used to attach PCB on image sensor chip, then electrical connection is achieved, but module height increases due to wire bonding space requirement
Solution Approach 1:
The patent extracts the wire bonding function from the traditional COB structure and replaces it with a direct PCB attachment method using solder bumps. The circuit board is directly mounted on the chip rear surface, eliminating the need for separate wire bonding space and reducing module height while maintaining electrical connection functionality.
Solution Approach 2:
The patent introduces solder bumps as an intermediary element between the chip electrodes and PCB pads, replacing the wire bonding process. This intermediary enables direct electrical connection without requiring wire bonding space, thus reducing module height while achieving reliable electrical connectivity.
2Productivity
If individual chip packaging is performed, then each chip is protected, but productivity decreases and manufacturing costs increase
Solution Approach 1:
The patent merges multiple individual chip packaging operations into a single wafer-level processing step. By attaching the PCB to the entire wafer containing multiple chips simultaneously and then separating the chips, the process achieves mass production efficiency while maintaining individual chip protection and electrical connection integrity.
Solution Approach 2:
The patent performs preliminary actions by attaching the PCB to the wafer level before chip separation. This preliminary attachment ensures that electrical connections are established for all chips simultaneously, enabling subsequent dicing to proceed without compromising connection integrity, thus improving productivity and reducing costs.
3Reliability
If traditional COB packaging is used, then chip protection is achieved, but particle contamination occurs during manufacturing
Solution Approach 1:
The patent performs preliminary encapsulation by forming the resin layer over the chip and PCB assembly before the dicing process. This preliminary protective action prevents particle contamination during manufacturing operations while maintaining chip protection, thereby improving yield rate without sacrificing reliability.
Solution Approach 2:
The patent applies beforehand cushioning by forming a protective resin encapsulation layer that covers the chip and electrical connections before potential contamination sources are encountered. This protective barrier prevents particle contamination during subsequent handling and dicing operations, improving both reliability and contamination resistance.
4Productivity
If wafer level processing is implemented, then mass production is enabled, but module size must be reduced
Solution Approach 1:
The patent applies segmentation by processing multiple chips on a wafer level and then separating them into individual modules through dicing. This segmentation enables mass production by handling multiple units simultaneously while allowing each final module to be compact in size, thus achieving both high productivity and small module area.
Solution Approach 2:
The patent utilizes another dimension by implementing wafer-level processing that operates in the planar domain before final module formation. This dimensional approach allows simultaneous processing of multiple chips across the wafer surface, enabling mass production while maintaining compact individual module sizes after separation.
Data Source
AI summary
A micro-element package which can reduce manufacturing costs and can be advantageous for mass production due to simplifying its structure and manufacturing process, and also can facilitate miniaturization and promote thinness, and a method of manufacturing the micro-element package. The micro-element package includes: a substrate having a micro-element on its top surface and a comparatively thin surrounding portion provided around the micro-element; and a circuit board that is electrically connected to the micro-element by utilizing the surrounding portion as a medium.