Massive Micro IC Testing via Scribe Line Probe Contact
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Solution Overview
Problem
Conventional probe cards are inefficient for testing micro integrated circuits due to high manufacturing costs and long testing times, as they require contacting each IC individually, making them unsuitable for high-efficiency testing of modern ICs with fine-pitch test pads.
Innovation Solution
A massive testing system and method that utilizes a probe to contact a first test area with test and reading pads on scribe lines, allowing multiple ICs to be tested row by row with each test controller, reducing the need for individual IC contact and significantly decreasing testing time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a conventional probe card is used to test each IC individually, then testing accuracy is maintained, but testing time becomes excessively long (exceeding 100 hours for an 8-inch wafer)
Solution Approach 1:
The patent merges multiple test functions into a single integrated test system. Multiple ICs in the same row share common test pads and are tested simultaneously through a single probe contact, combining what were previously separate individual testing operations into one unified process.
Solution Approach 2:
The test pads on the scribe lines serve multiple functions: they are used for testing all ICs in a row, and the same pads are reused across different rows through sequential row-by-row testing. This multi-functional design eliminates the need for dedicated test pads for each individual IC.
2Manufacturing precision
If a micro-electrical-mechanical probe card is used to achieve fine-pitch testing (less than 13 μm), then testing precision is improved, but manufacturing cost increases significantly
Solution Approach 1:
The patent combines multiple IC tests into a single probe card contact by utilizing the scribe line area. Instead of requiring separate high-precision contacts for each IC, the system merges testing of multiple fine-pitch ICs through shared test pads located on the scribe lines between chip frames.
3Reliability
If each IC is contacted once by the probe, then testing completeness is ensured, but the number of probe contacts increases dramatically (44 frames × 10,000 ICs)
Solution Approach 1:
The patent segments the wafer testing into row-by-row processing. Each row is tested as a unit through a single probe contact, and the test controller sequentially processes different rows. This segmentation maintains complete testing coverage while dramatically reducing the total number of probe contacts required.
Solution Approach 2:
The test controller acts as an intermediary between the single probe contact and multiple ICs. It coordinates the row-by-row testing sequence, ensuring that each IC is tested while managing the complexity of multiple contacts through centralized control logic.
Data Source
AI summary
A massive testing system of a micro integrated circuit includes: a first test area including a plurality of test pads and a plurality of reading pads, and disposed on scribe lines; a plurality of test controllers disposed on the scribe lines one by one; and a probe configured to contact the first test area to test a plurality of rows of integrated circuit chips; wherein each of the plurality of test controllers is configured to test a respective one of the plurality of rows of integrated circuit chips row by row; wherein the probe merely contacts the first test area once; wherein the plurality of reading pads are configured to read test results of each of the plurality of rows of integrated circuit chips row by row.