Multi-stepped Interlayer Insulating Structure for Micro LED Bonding Yield
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The development of high-resolution and large-size micro LED displays is hindered by the poor yield of the bonding process in side wiring technology, which restricts the rapid advancement of micro LED spliced display screens due to the complexity of connecting signals and power supply voltage signals across the display panel.
Innovation Solution
A display substrate with a multi-stepped interlayer insulating structure and signal lead-in wires that extend from the display region to the bonding region, reducing the risk of signal lead-in wire breakage and improving the bonding process yield by creating a buffering effect, allowing for seamless splicing of display panels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If side wiring technology is used to lead signals from the front side to the back side of the display panel, then large-screen display and seamless splicing can be realized, but the bonding process yield becomes poor
Solution Approach 1:
The patent applies beforehand cushioning by designing a multi-stepped interlayer insulating structure that gradually transitions from the display region to the bonding region. This stepped structure acts as a cushioning mechanism that reduces stress concentration and prevents wire breakage during the bonding process, thereby improving bonding yield while enabling large-screen display implementation
2Ease of operation
If signal lead-in wires are extended across the entire display panel, then seamless splicing can be achieved, but the risk of wire breakage increases
Solution Approach 1:
The patent applies segmentation by dividing the interlayer insulating layer into multiple stepped sub-layers between the display region and bonding region. This segmented structure creates intermediate transition zones that reduce the mechanical stress on the signal lead-in wires, preventing wire breakage while maintaining seamless splicing capability across the display panel
Solution Approach 2:
The patent applies another dimension by creating a multi-level stepped structure in the vertical dimension (Z-axis) rather than simply extending wires in the horizontal plane. This vertical dimensionality change provides a gradual transition path that reduces wire stress and prevents breakage while enabling seamless splicing
Data Source
AI summary
The present application provides a display substrate, a display panel and a spliced screen, and belongs to the field of display technology. The display substrate in the present application is divided into display and boding regions, and includes a base substrate, and a pixel driving circuit on the base substrate and corresponding to the display region. The display substrate further includes an interlayer insulating layer and a signal lead-in wire on the base substrate. The signal lead-in wire at least includes a first signal lead-in sub-wire on a side of the interlayer insulating layer away from the base substrate. The first signal lead-in sub-wire is connected to a first connection pad in the bonding region for introducing an external signal to the pixel driving circuit. The interlayer insulating layer includes sub-insulating layers defining a multi-stepped structure at a position where the display region is adjacent to the bonding region.

