Micro LED Chip Segmentation for Bonding Yield
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Solution Overview
Problem
The alignment of micro LED electrodes with pads on the backplane in display panels is challenging, leading to low production yield and image quality due to the need for multiple bonding layers and redundant repair pads, which limits the number of sub-pixel regions and overall resolution.
Innovation Solution
A micro light emitting diode chip design with a semiconductor epitaxial structure, multiple electrodes, and trenches that allows for independent control of light-emitting layers, enabling successful bonding and reducing defect pixels by utilizing a larger electrode bonding area, thereby improving production yield and image quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple bonding layers and redundant repair pads are used to improve bonding success rate, then production yield improves, but device complexity increases and manufacturing precision deteriorates
Solution Approach 1:
The patent divides the micro LED chip into multiple independent light-emitting regions, each with its own electrode structure. This segmentation allows individual regions to be bonded independently to the backplane, increasing the probability that at least one region bonds successfully without requiring multiple bonding layers across the entire chip.
Solution Approach 2:
The patent creates different electrode structures for different light-emitting regions, with each region having electrodes optimized for its specific location and function. This local differentiation enables precise alignment with corresponding pads on the backplane, improving bonding success rate without adding overall device complexity.
2Ease of repair
If redundant repair pads are reserved in each sub-pixel region, then ease of repair improves, but manufacturing precision deteriorates due to limited sub-pixel regions
Solution Approach 1:
The patent pre-configures multiple light-emitting regions with independent electrode structures before bonding to the backplane. This preliminary arrangement ensures that if one region fails to bond or is defective, other regions are already in position and can be activated, eliminating the need for post-bonding repair operations and maintaining high manufacturing precision.
3Manufacturing precision
If micro LED electrodes are aligned with pads on the backplane, then manufacturing precision improves, but device complexity increases due to multiple bonding requirements
Solution Approach 1:
The patent segments the micro LED chip into multiple light-emitting regions, each with its own electrode structure that can be independently aligned with corresponding pads on the backplane. This segmentation simplifies the bonding process by allowing regional alignment rather than requiring complex multi-layer bonding of the entire chip.
Solution Approach 2:
The patent designs specific electrode structures for each light-emitting region based on local alignment requirements with the backplane pads. This local optimization enables precise electrode-pad alignment without requiring complex bonding processes, as each region is tailored to its specific positioning needs.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design enhances the probability of successful bonding, reduces defect pixels, and increases the overall resolution of the display panel by allowing for independent control of light-emitting layers and improved electrode alignment.
Implementation Method 1
The light emitting layers are located between the first type doped semiconductor layer and the second type doped semiconductor layers. The light-emitting layers are located in the light-emitting regions respectively and electrically contact to the first-type doped semiconductor layer
Data Source
AI summary
A micro light emitting diode chip having a plurality of light-emitting regions, including a semiconductor epitaxial structure, a first electrode and a plurality of second electrodes disposed at interval is provided. The semiconductor epitaxial structure includes a first-type doped semiconductor layer, a plurality of second-type doped semiconductor layers and a plurality of light-emitting layers disposed at interval. The light-emitting layers are located between the first-type doped semiconductor layer and the second-type doped semiconductor layer. The light-emitting layers are located in the light-emitting regions respectively and electrically contact to the first-type doped semiconductor layer. The first electrode is electrically connected and contacts to the first-type doped semiconductor layers. The second electrodes are electrically connected to the second-type doped semiconductor layers. Furthermore, a display panel is also provided.