Micro LED Etching Sequence for Sidewall Bond and Size Control

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Solution Overview

Problem

Conventional micro light-emitting diode structures face issues with dry etching damaging molecular structures and causing dangling bonds, leading to reduced external quantum efficiency, and wet etching lacks stability and control over plane size due to isotropic etching.

Innovation Solution

A micro light-emitting diode structure is formed by first dividing the base layer using dry etching, followed by sequential formation of the second-type semiconductor layer and light-emitting layer using wet etching, allowing for reduced dangling bonds and improved size control.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If dry etching is used to divide the epitaxial wafer, then the size of micro light-emitting diode structures can be precisely controlled, but dangling bonds are generated on sidewalls causing reduced light-emitting efficiency

Engineering Contradiction:
Improvesize controlVSAvoiddangling bonds
Core Design Contradiction:
Manufacturing precisionVSObject-generated harmful factors

Solution Approach 1:

The patent segments the etching process into two distinct stages: first dry etching to achieve precise size control and pattern definition, then wet etching to remove dangling bonds and smooth sidewalls. This segmentation allows each etching method to perform its optimal function without the drawbacks of using either method alone for the complete process.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary treatment step between dry and wet etching that involves surface reconstruction and chemical treatment. This intermediary process allows the transition from the dry-etched state with dangling bonds to a final state with reduced harmful factors, effectively mediating between the precision requirement and the quality requirement.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Object-generated harmful factors

If wet etching is used to divide the epitaxial wafer, then dangling bonds are reduced, but the plane size is reduced too much due to over-etching

Engineering Contradiction:
Improvedangling bondsVSAvoidplane size
Core Design Contradiction:
Object-generated harmful factorsVSManufacturing precision

Solution Approach 1:

The patent performs preliminary dry etching to establish the precise pattern and size before applying wet etching. This preliminary action defines the boundaries that protect against over-etching, as the dry-etched structures serve as masks or protective elements during the subsequent wet etching process that removes dangling bonds.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent applies partial wet etching selectively to specific regions or surfaces where dangling bonds need to be removed, rather than applying excessive wet etching uniformly throughout the structure. This controlled partial application maintains precision while achieving the benefit of reduced dangling bonds.

Inventive Principle:
Principle #16Partial or excessive action

3Object-generated harmful factors

If long-time wet etching is applied to all layers, then dangling bonds are reduced, but the stability of manufacturing process decreases and other layers are damaged

Engineering Contradiction:
Improvedangling bondsVSAvoidmanufacturing stability
Core Design Contradiction:
Object-generated harmful factorsVSReliability

Solution Approach 1:

The patent segments the etching process by layer type and timing, applying wet etching selectively after dry etching has established protective structures. This segmentation prevents long-time continuous wet etching that would damage multiple layers, while still achieving dangling bond reduction in the light-emitting layer through controlled, shorter wet etching exposure.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances external quantum efficiency by minimizing the adverse effects of wet etching on the micro light-emitting diode structure and improves light-emitting efficiency while maintaining stability and control over the structure's size.

Implementation Method 1

The dry etching process is to use plasma of reactive ions to etch the epitaxial wafer

Methodology Applied
Scientific EffectPlasma: Plasma

Implementation Method 2

which is an anisotropic etching

Methodology Applied
Scientific EffectAnisotropic etching:

Implementation Method 3

The wet etching is to etch the epitaxial wafer via chemical etching solution

Methodology Applied
Scientific EffectChemical etching:

Implementation Method 4

which is an isotropic etching

Methodology Applied
Scientific EffectIsotropic etching:

Data Source

PatentUS20240347673A1Micro light-emitting diode structure and display panel device
Publication Date: 2024.10.17 PLAYNITRIDE DISPLAY CO LTD
  • US20240347673A1 patent drawing
  • US20240347673A1 patent drawing
  • US20240347673A1 patent drawing

AI summary

A micro light-emitting diode structure includes a first-type semiconductor layer, a light-emitting layer, a second-type semiconductor layer, and a base layer stacked with each other. A width of the light-emitting layer is greater than that of the first-type semiconductor layer and that of the second-type semiconductor layer. A width of the base layer is at least greater than that of the second-type semiconductor layer. A manufacturing method of the micro light-emitting diode structure by mixing dry etching and wet etching. The manufacturing method not only reduces the time that the semiconductor layers are in contact with the etching solution in the wet etching process to increase the etching stability, but avoids the dangling bond effect on the sidewall caused by the dry etching. Therefore, a combination of the advantages of the two etchings further increases the external quantum efficiency.