Micro-LED Metal Layer Layout for Light Extraction and Transfer Stability
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Solution Overview
Problem
Existing micro-LEDs face challenges in achieving optimal device characteristics, product yield, and mass transfer stability due to limitations in their dimensional design and manufacturing processes, which affect their performance and reliability.
Innovation Solution
The design of an optoelectronic semiconductor element with a semiconductor stack and strategically positioned metal layers, where the metal layers are electrically connected to the semiconductor stack and configured to form specific patterns that improve light extraction efficiency, reduce electric field concentration, and enhance precision and stability, thereby addressing the issues of appearance abnormality and transfer stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Illumination intensity
If the metal layer area is increased to improve light extraction efficiency, then light extraction efficiency is improved, but the area ratio control becomes more difficult and manufacturing precision is affected
Solution Approach 1:
The patent specifies precise area ratio parameters (0.5% to 10%) for the metal layer relative to the first portion, transforming the design into a parameter-controlled solution. By defining specific numerical ranges for the area ratio, the patent enables precise control over light extraction efficiency while maintaining manufacturability through quantifiable design criteria.
2Reliability
If the micro-LED size is miniaturized to improve device characteristics, then device characteristics are improved, but mass transfer stability and product yield deteriorate
Solution Approach 1:
The patent applies local quality by creating a specific metal layer configuration with controlled area ratio (0.5% to 10%) that is localized to the first portion of the semiconductor stack. This localized structural optimization improves device characteristics at the micro-LED level while the standardized design enables consistent mass production and transfer stability.
3Object-affected harmful factors
If the metal layer pattern is optimized to reduce electric field concentration, then electric field concentration is reduced, but device complexity increases
Solution Approach 1:
The patent extracts the electric field concentration problem by introducing a separately configured metal layer with controlled area ratio (0.5% to 10%) that is electrically connected to the first portion. This extracted metal layer structure addresses the electric field issue independently while maintaining relatively simple overall device architecture through standardized layer configuration.
Data Source
AI summary
An optoelectronic semiconductor element is provided. The optoelectronic semiconductor element includes a semiconductor stack and a first metal layer. The semiconductor stack includes a first portion and a second portion stacked in sequence, with the second portion including an active region. The first metal layer is located on the first portion and is electrically connected to the first portion. A top-view outline of the first portion shows a first pattern, a top-view outline of the second portion shows a second pattern, and a top-view outline of the first metal layer shows a third pattern. The area ratio of the third pattern to the first pattern is from 0.5% to 10%.