Series-Connected Micro LED Sub-Pixels for Lower Power Displays
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Solution Overview
Problem
Micro LED displays face high power consumption issues due to their battery-powered nature, limiting their use time, despite having high brightness suitable for outdoor use.
Innovation Solution
Implementing series-connected LEDs in sub-pixel groups within the display device and semiconductor structure, coupled through connecting elements, and utilizing multiple reference voltage terminals to provide different voltages to sub-pixel groups, along with specific doping of epitaxy layers to prevent leakage currents.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Duration of action of moving object
If micro LED displays use battery power, then portability and outdoor usability are improved, but power consumption increases and use time decreases
Solution Approach 1:
The display is divided into multiple sub-pixel groups, with each group containing light-emitting components of the same color coupled in series. This segmentation allows independent voltage optimization for different color groups, reducing overall power consumption while maintaining the battery-powered portable design
Solution Approach 2:
Different reference voltages are applied to different sub-pixel groups (first, second, and third reference voltages for different color groups). By optimizing the voltage parameters for each color group separately, the total power consumption is reduced, extending battery life and use time
2Use of energy by moving object
If series-connected LEDs are implemented in sub-pixel groups, then power consumption is reduced, but device complexity increases
Solution Approach 1:
The display is divided into multiple sub-pixel groups, with each group containing light-emitting components of the same color coupled in series. This segmentation allows independent voltage optimization for different color groups, reducing overall power consumption while maintaining the battery-powered portable design
Solution Approach 2:
Multiple reference voltage terminals provide different reference voltages to different sub-pixel groups simultaneously. This multi-functional voltage supply system handles different color groups with different voltage requirements through a unified structure, managing complexity while achieving power reduction
3Loss of energy
If multiple reference voltage terminals are used, then power efficiency is enhanced, but manufacturing complexity increases
Solution Approach 1:
Different reference voltages are applied to different sub-pixel groups (first, second, and third reference voltages for different color groups). By optimizing the voltage parameters for each color group separately, the total power consumption is reduced, extending battery life and use time
Solution Approach 2:
The patent combines multiple voltage supply lines into a unified reference voltage terminal system. By providing different reference voltages through dedicated terminals for different color groups, the design achieves efficient power management while maintaining manufacturability through standardized terminal integration
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Reduces power consumption by optimizing current flow and voltage distribution, enhancing power efficiency and extending the operational time of micro LED displays.
Implementation Method 1
Each of the first sub-chip and the second sub-chip includes a first diffusion layer, an active layer, and a second diffusion layer... The first diffusion layer, the active layer, and the second diffusion layer are arranged on the buffer layer in a top-down order
Implementation Method 2
The connecting element is configured to electrically couple the second diffusion layer of the first sub-chip with the first diffusion layer of the second sub-chip
Implementation Method 3
the first diffusion layer and the buffer layer are first-type epitaxy layers, and the second diffusion layer is a second-type epitaxy layer
Data Source
AI summary
The present disclosure provides a semiconductor device, including a buffer layer, a first sub-chip and a second sub-chip, and a connecting element. The first sub-chip and the second sub-chip are separately arranged on the buffer layer. Each of the first sub-chip and the second sub-chip includes a first diffusion layer, an active layer, and a second diffusion layer. The first diffusion layer, the active layer, and the second diffusion layer are sequentially arranged on the buffer layer in a top-down approach. The first diffusion layer and the buffer layer are first-type epitaxial layers, and the second diffusion layer is a second-type epitaxial layer. The connecting element is configured to couple the second diffusion layer of the first sub-chip and the first diffusion layer of the second sub-chip.