Micro-LED Array Tunnel Junction Layout for Uniform Full-Color Growth

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Solution Overview

Problem

Existing methods for forming full-color micro-LED displays face challenges such as non-uniform compositions, contamination from mask materials, and compromised conductivity due to etching on p-type GaN surfaces, which require recalibration for geometry changes and limit the process window.

Innovation Solution

A method involving geometry-independent deposition processes where first and second LED stacks are formed on a substrate, followed by selective removal steps, avoiding mask layers and ensuring conductivity by using a tunnel junction to protect the p-type layer, allowing for different native LEDs to be monolithically formed across various geometries.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If selective-area-growth (SAG) deposition steps are used to form multiple colour LED arrays, then different coloured LEDs can be formed on different regions of the substrate, but the growth conditions are severely influenced by local surroundings requiring recalibration for geometry changes

Engineering Contradiction:
ImproveAbility to form different coloured LEDs on substrateVSAvoidProcess recalibration requirement
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The substrate is divided into different regions with specific mask patterns (e.g., region 102 with first pattern, region 104 with second pattern) that define where different coloured LEDs will grow. This segmentation allows each region to be optimized independently while maintaining overall process consistency across different device geometries.

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If SAG fabrication is used to form LEDs, then multiple coloured sub-pixels can be integrated, but non-uniform compositions occur across single sub-pixels leading to broad emission wavelengths and reduced colour purity

Engineering Contradiction:
ImproveIntegration of multiple coloured sub-pixelsVSAvoidComposition uniformity
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

Different mask patterns are applied to different regions of the substrate (region 102 with first pattern, region 104 with second pattern) to control the local growth conditions. This ensures uniform composition within each sub-pixel region while allowing different coloured LEDs to be formed in different regions, thereby maintaining colour purity.

Inventive Principle:
Principle #3Local quality

3Ease of manufacture

If mask materials are used in the SAG process, then selective growth can be achieved, but contamination of the active region with unwanted impurities occurs

Engineering Contradiction:
ImproveSelective growth capabilityVSAvoidContamination from mask materials
Core Design Contradiction:
Ease of manufactureVSObject-affected harmful factors

Solution Approach 1:

The mask layer is completely removed after the selective growth process is completed. This extraction of the mask material eliminates the source of contamination while having already served its purpose of defining the growth regions during the SAG process.

Inventive Principle:
Principle #2Taking out (Extraction)

4Adaptability or versatility

If p-type GaN surfaces are exposed during masked regions in LED array formation, then selective LED formation is achieved, but decomposition occurs during subsequent high temperature deposition compromising anode contact

Engineering Contradiction:
ImproveSelective LED formationVSAvoidAnode contact conductivity
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The mask layer is applied to protect p-type GaN surfaces before subsequent high temperature deposition steps. This preliminary protective action prevents decomposition of the p-type GaN during high temperature processing, thereby maintaining anode contact conductivity.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The mask layer serves as a protective barrier that cushions the p-type GaN surfaces from high temperature damage during subsequent deposition steps. This beforehand protection ensures that the anode contact remains intact and conductive.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

5Adaptability or versatility

If geometry-independent deposition processes are used, then layers can be deposited across substrate and subsequently patterned, but terminating etching on p-type semiconducting Group III-nitride compromises conductivity

Engineering Contradiction:
ImproveGeometry independenceVSAvoidp-type layer conductivity
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

Instead of patterning the p-type GaN layer directly (which would compromise conductivity), the mask is applied to the n-type GaN layer. The etching process then removes material from the n-type region, and the mask is removed, leaving the p-type layer intact and conductive.

Inventive Principle:
Principle #13The other way round (Inversion)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method reduces contamination risks, maintains conductivity, and enables the formation of high-resolution micro-LED arrays without the need for recalibration, resulting in improved color purity and uniformity across different device geometries.

Implementation Method 1

ensuring conductivity by using a tunnel junction to protect the p-type layer

Methodology Applied
Scientific EffectTunnel junction: Diode

Implementation Method 2

geometry-independent deposition processes where first and second LED stacks are formed on a substrate

Methodology Applied
Scientific EffectDeposition: Deposition (physical)

Data Source

PatentEP4010934B1LED array and method of forming a LED array
Publication Date: 2025.10.15 PLESSEY SEMICON LTD
  • EP4010934B1 patent drawingFigure 1a~1b
  • EP4010934B1 patent drawingFigure 2~4
  • EP4010934B1 patent drawingFigure 5

AI summary

A Light Emitting Diode (LED) array precursor is provided. The LED array precursor comprises a substrate having a substrate surface, a first LED stack, a p++ layer, a n++layer and a second LED stack. The first LED stack is provided on a first portion of the substrate surface. The first LED stack comprises a plurality of first Group Ill-nitride layers defining a first semiconductor junction configured to output light having a first wavelength wherein a n-type side of the first semiconductor junction is orientated towards the substrate surface. The p++ layer is provided on the first LED stack, the p++ layer comprising a Group Ill-nitride. The n++ layer has a first portion covering the p++ layer of the first LED stack and a second portion covering a second portion of the substrate surface, wherein a tunnel junction is formed at an interface between the n++ layer and the p++ layer, the n++ layer comprising a Group Ill-nitride. The second LED stack is provided on the second portion of the n++ layer covering the second portion of the substrate surface. The second LED stack comprises a plurality of second Group Ill-nitride layers defining a second semiconductor junction configured to output light having a second wavelength different to the first wavelength, wherein a n-type side of the semiconductor junction is provided towards the n++ layer. A method of manufacturing a LED array precursor is also provided.