Micro LED Pixel Layout With Under-Bank Signal Routing
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Solution Overview
Problem
Existing display technologies face challenges in achieving high pixel density, reducing power consumption, and improving manufacturing yield while minimizing electrical interference and mechanical stress, particularly in foldable displays.
Innovation Solution
The display apparatus features a signal routing and pixel layout structure with overlapping signal lines below micro LED banks, a multi-layered structure for signal separation, and a flexible substrate design with patterned link lines and selectively removed insulating layers to reduce mechanical stress and enhance durability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If signal lines are placed between adjacent banks to connect pixels, then electrical connection is achieved, but electrical interference increases and pixel density decreases
Solution Approach 1:
The signal lines are moved from the horizontal plane (between banks) to the vertical dimension (below banks, overlapping them). This spatial reconfiguration allows signal lines to pass underneath the banks in the vertical direction, eliminating electrical interference with adjacent signal lines while maintaining electrical connection to pixels through contact holes through the insulating layers.
Solution Approach 2:
The signal lines are positioned within the vertical space occupied by the bank structure, effectively nesting the signal routing within the bank region. The signal lines overlap the banks and pass through insulating layers that are selectively removed to create contact holes, allowing the signal lines to be embedded within the vertical profile of the bank structure rather than occupying separate horizontal space.
2Productivity
If pixel spacing is reduced to increase pixel density, then resolution improves, but manufacturing precision requirements increase
Solution Approach 1:
The invention changes the spatial parameter of signal line positioning from horizontal separation to vertical overlapping. By moving signal lines below the banks and allowing them to overlap in the vertical dimension, the horizontal spacing between pixels can be reduced without compromising signal line separation, thus enabling higher pixel density while maintaining manufacturability.
3Loss of energy
If signal line width is increased to reduce voltage drop, then power consumption improves, but pixel density decreases
Solution Approach 1:
By transitioning signal line routing to the vertical dimension (overlapping banks), the horizontal space required for signal lines is eliminated. This allows signal lines to achieve sufficient width for low voltage drop without consuming horizontal pixel space, as they are routed below the pixel banks rather than between them.
4Reliability
If insulating layers are removed in bending areas to reduce mechanical stress, then durability improves, but electrical insulation may be compromised
Solution Approach 1:
The insulating layers are selectively removed only in specific bending areas where mechanical stress occurs, while maintaining insulating coverage in other regions. The signal lines in these locally modified areas are positioned to overlap banks and pass through contact holes, ensuring electrical insulation is maintained where needed while allowing mechanical flexibility where required.
Data Source
AI summary
A display apparatus is provided. The display apparatus comprises a substrate, one or more pixel driving circuits disposed on the substrate, a plurality of insulating layer disposed on the pixel driving circuit, a plurality of banks disposed on the plurality of insulating layers. A plurality of micro LEDs is disposed on the banks and electrically connected to the pixel driving circuit through a plurality of first electrodes, which are positioned between the banks and the micro LEDs. A plurality of signal lines is disposed below the banks so as to overlap the banks and directly contact the first electrodes. This configuration enables efficient signal transmission and improves pixel integration by reducing the interval between adjacent pixels. Additionally, by overlapping the banks with signal lines and avoiding routing between adjacent banks, electrical connection between signal lines carrying different signals is suppressed, thereby minimizing interference and improving circuit reliability.