Bi-directional Micro-mirror Array Addressing Circuit
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Solution Overview
Problem
Micro mirror array based spatial light modulators face inefficiencies in large deflection angles due to reduced gap size, leading to deteriorated electromechanical efficiency and increased complexity in control circuitry, particularly in bi-directional operations where interference from photoelectron current is a concern.
Innovation Solution
A spatial light modulator design featuring a control substrate with a common electrode at a fixed potential, an addressing electrode, a single CMOS transistor connected to a storage capacitor, and a word-line/bit-line interconnection structure, along with metal steps on electrodes to reduce the effective gap and enhance electrostatic torque, allowing for effective drive voltage waveforms for large angle deflection without inverters and with reduced transistor count.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Illumination intensity
If gap size is reduced to achieve larger deflection angles, then brightness and contrast ratio are improved, but electromechanical efficiency deteriorates
Solution Approach 1:
The patent applies parameter changes by introducing a voltage-dependent gap adjustment mechanism. The gap size is no longer fixed but dynamically adjusted based on the driving voltage applied to the micro mirror. At lower voltages, a larger gap maintains stability, while at higher voltages, a smaller gap enables larger deflection angles, thus resolving the contradiction between electromechanical efficiency and deflection capability
Solution Approach 2:
The patent implements dynamics by making the gap size variable rather than static. The gap adjusts automatically in response to the driving voltage, allowing the system to adapt to different operating conditions. This dynamic adjustment enables the micro mirror to achieve large deflection angles while maintaining electromechanical efficiency across the entire voltage range
2Illumination intensity
If higher bias voltage is applied to compensate for reduced electromechanical efficiency, then large angle deflection is achieved, but power consumption increases
Solution Approach 1:
The patent uses parameter changes by making the gap size voltage-dependent. Instead of applying continuously high bias voltage to maintain deflection, the system applies higher voltage only when needed for large angle deflection, while maintaining a larger gap at lower voltages. This reduces average power consumption while still achieving large angle deflection when required
Solution Approach 2:
The patent implements dynamics by allowing the gap to adjust with the driving voltage. This dynamic behavior enables the system to achieve large angle deflection with lower average power consumption, as the electrostatic force is optimized at each voltage level rather than requiring continuous high bias
3Adaptability or versatility
If two independent transistor cells are used for bi-directional operation, then control flexibility is improved, but device complexity increases
Solution Approach 1:
The patent applies universality by designing a single transistor cell that can perform multiple functions: controlling both directions of mirror rotation and managing both landing positions. The voltage-dependent gap mechanism enables this single transistor to provide bi-directional control flexibility that previously required two separate transistor cells, thus reducing device complexity while maintaining adaptability
Solution Approach 2:
The patent merges the functions of two separate transistor cells into a single transistor cell. By combining the control of bidirectional rotation and bidirectional landing position control into one transistor, the patent reduces the transistor count and circuitry complexity while maintaining the full functionality required for bi-directional operation
4Ease of operation
If address node is directly connected to mirror plate for individual addressing, then addressing simplicity is improved, but vulnerability to photoelectron current interference increases
Solution Approach 1:
The patent introduces an intermediary mechanism - the voltage-dependent gap adjustment system - that mediates between the address node and the mirror plate. This intermediary allows the address node to be electrically isolated from the mirror plate while still achieving individual addressing capability through voltage-controlled gap adjustment, thus blocking photoelectron current interference while maintaining addressing functionality
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enables efficient large angle deflection with reduced snap voltage, lower addressing voltage requirements, and improved reliability by decoupling angular direction from transition, minimizing artifacts from defective pixels and reducing interference from incident light.
Implementation Method 1
One mechanism for driving a micro mirror array tilts the mirrors with a torsion torque around the hinge, where the torque is generated by electrostatic force in a capacitive parallel plate configuration. An electrostatic attractive force is generated when two conductive plates at different electric potentials are brought in close vicinity with one another.
Implementation Method 2
The electrostatic torque is proportional to the square of the voltage difference across the gap between an electrode, the first plate, and the mirror, the second plate, and inversely proportional to the square of the gap size. The gap size varies as the mirror rotates through its range of angular positions.
Data Source
AI summary
A control substrate of spatial light modulator for a bi-directional micro mirror array includes a plurality of unit cells, each includes a common electrode at a fixed constant potential and an addressing electrode under the mirror plate on opposite sides of a pivot point of the mirror hinge, a pair of micro landing tips, a single CMOS transistor electrically connected to a storage capacitor, and a word-line/bit-line interconnection structure for communicating signals.