Micro Protection Chips for ESD and EOS in LED Arrays
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Solution Overview
Problem
Electronic systems, particularly display systems with micro devices, are vulnerable to damage from electro-static discharge (ESD) and electric overstress (EOS) events due to the small size of components, making it impractical to incorporate conventional ESD and EOS protection devices that are typically larger than the devices themselves.
Innovation Solution
Incorporating micro protection chips with scalable ESD and EOS protection devices, such as thyristors, varistors, and MOSFETs, connected between signal lines, power supply lines, and ground, to provide protection against ESD and EOS events, with multiple protection chips working in parallel to achieve scalable and effective protection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional ESD and EOS protection devices are used, then protection effectiveness is improved, but device size increases making it impractical for micro devices
Solution Approach 1:
The protection function is segmented into multiple micro protection chips distributed across the substrate, with each chip containing scaled-down ESD and EOS protection devices. This segmentation allows the system to achieve comprehensive protection coverage while keeping individual device sizes compatible with micro device dimensions
Solution Approach 2:
The protection devices are scaled to micro dimensions with adjusted geometric parameters and electrical characteristics. By changing the physical parameters (size, capacitance, resistance) while maintaining the protective function, the devices can protect micro devices without exceeding size constraints
2Reliability
If multiple protection chips are used in parallel, then protection coverage and effectiveness are improved, but system complexity increases
Solution Approach 1:
Multiple protection chips are merged into a coordinated system where each chip handles a specific region or function. The chips work in parallel but are managed through standardized interfaces and control mechanisms, reducing the perceived complexity while maintaining comprehensive protection coverage
Solution Approach 2:
The protection chips are designed with universal functionality to handle both ESD and EOS events, and can protect multiple types of devices. This multi-functionality reduces the need for specialized protection circuits for different scenarios, simplifying the overall system architecture
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The micro protection chips provide ESD and EOS protection that is identical or superior to existing solutions, effectively safeguarding micro devices from damage caused by ESD and EOS events during fabrication, connection, and subsequent use, even in size-constrained systems.
Implementation Method 1
one or more electro-static discharge (ESD) protection devices to assist with protection against damage caused by one or more ESD events
Implementation Method 2
one or more electric overstress (EOS) protection devices to assist with protection against damage caused by one or more EOS events
Implementation Method 3
The one or more ESD protection devices can be formed using at least one of a thyristor, a varistor, a polymer ESD device, a gas discharge tube
Data Source
AI summary
A display system includes an array of light emitting diodes (LEDs), first and second driver chips, and one or more protection chips on a display substrate. The first and second driver chips are to drive a first group of LEDs of the array of LEDs and a second group of LEDs of the array of LEDs, respectively. Each protection chip includes one or more electro-static discharge (ESD) protection devices to assist with protecting the driver chips from damage caused by an ESD event. In one embodiment, each ESD protection device is connected between one or more signal lines, one or more power supply voltage lines, and an electrical ground line of the display substrate. In one embodiment, at least one protection chip comprises one or more electric overstress (EOS) protection devices to assist with protecting the driver chips from damage caused by an EOS event.