Micro-Transfer Printed Compound Power Transistor
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Solution Overview
Problem
Existing methods for integrating logic and power transistors with different materials are inconvenient and inefficient, particularly due to challenges in forming compound semiconductor layers on silicon substrates and managing heat generated by power transistors, which affects performance and manufacturing time.
Innovation Solution
A compound power transistor device is created by micro-transfer printing power transistors made from a second semiconductor material, such as GaAs, onto a first semiconductor substrate like silicon, allowing for separate processing and optimization of materials, with the power transistors connected in parallel to distribute heat and improve efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If different semiconductor materials are used for logic and power transistors to optimize performance, then power transistor performance is improved, but integration complexity and manufacturing difficulty increase
Solution Approach 1:
The patent divides the integrated circuit into separate modules: logic circuits fabricated on silicon substrates and power transistors fabricated on compound semiconductor substrates (GaAs, InP, etc.). These segmented modules are then independently processed and finally integrated through wafer bonding or epitaxial integration, resolving the contradiction by allowing material optimization for each function while managing complexity through modular architecture.
Solution Approach 2:
The patent introduces intermediate layers and structures to facilitate integration between different semiconductor materials. These include buffer layers, transition layers, and specialized bonding interfaces that mediate the integration process between silicon-based logic circuits and compound semiconductor power transistors, enabling heterogeneous integration while managing material incompatibilities.
2Reliability
If compound semiconductor layers are formed on silicon substrates to integrate different materials, then material optimization is achieved, but manufacturing time and process complexity increase
Solution Approach 1:
The patent performs preliminary fabrication of logic circuits on silicon wafers and power transistors on compound semiconductor wafers separately before final integration. This preliminary parallel processing allows both material optimizations to be realized while reducing total manufacturing time compared to sequential processing, as the most time-consuming material-specific processes are performed concurrently on separate substrates.
Data Source
AI summary
Embodiments of the present invention provide a compound power transistor device including a first semiconductor substrate including a first semiconductor material, a second semiconductor substrate including a second semiconductor material different from the first semiconductor material, and a power transistor formed in or on the second semiconductor substrate. In certain embodiments, the second semiconductor substrate is micro-transfer printed on and secured to the first semiconductor substrate.