Microcode-Controlled Frequency Synthesizer for PLL Initialization
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Solution Overview
Problem
Frequency synthesizers cannot modify their behavior during initialization without relying on logical interfaces, limiting their configuration and operation, especially during processor board re-initialization and overclocking processes.
Innovation Solution
Implementing a microcode mode that allows programmable circuits, such as the phase locked loop (PLL) circuit, to be controlled through the execution of microcode instructions during initialization and normal operation, enabling behavior modification without relying on logical interfaces.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If the frequency synthesizer uses a logical interface to receive configuration during power-on, then the configuration can be loaded into the PLL circuit, but the processor cannot modify the configuration until initialization is complete and the logical interface is accessible
Solution Approach 1:
The patent applies preliminary action by loading default configuration values into the PLL circuit before the logical interface becomes accessible. During power-on initialization, the frequency synthesizer receives default values through the logical interface and immediately loads them into the PLL circuit, enabling the PLL to start operating before the processor is fully initialized. This allows the system to begin frequency synthesis operations without waiting for the logical interface to be fully accessible, thereby reducing initialization time while maintaining configuration capability.
2Adaptability or versatility
If the frequency synthesizer relies on the logical interface for configuration, then the interface provides a standardized method for setting parameters, but the system cannot modify behavior during initialization or without utilizing the logical interface
Solution Approach 1:
The patent applies self-service by enabling the frequency synthesizer to load and apply default configuration values autonomously during power-on initialization, without requiring continuous processor intervention or logical interface access. The PLL circuit is designed to automatically receive default values from on-chip memory or registers and configure itself, allowing the system to modify its behavior during initialization and operate independently of the logical interface for basic frequency synthesis operations.
3Ease of operation
If the processor board and frequency synthesizer are initialized sequentially, then the initialization process is simple to manage, but the processor is unable to modify the configuration until initialization is complete
Solution Approach 1:
The patent applies preliminary action by pre-loading default configuration values into the PLL circuit during the early stages of power-on initialization, before the processor completes its initialization sequence. This allows the frequency synthesizer to be configured and operational before the processor gains full access to the logical interface, enabling earlier configuration accessibility without complicating the initialization management.
Data Source
AI summary
A frequency synthesizer with microcode control that allows one or more programmable circuits of a frequency synthesizer system to be programmed using a plurality of microcode instructions. A method includes, setting a frequency synthesizer system to operate in a microcode mode, programming the frequency synthesizer system for microcode execution of a plurality of microcode instructions and executing the plurality of microcode instructions at the frequency synthesizer system to control one or more behaviors of one or more programmable circuits of the frequency synthesizer system.