Microcode Update Coordination in Microcontrollers

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Solution Overview

Problem

Microcontroller updates often require rebooting or interrupting hardware peripheral programming, leading to increased downtime, operational load, and software complexity.

Innovation Solution

A method for on-the-fly microcode updates in microcontrollers, where a global authorization signal is generated and transmitted to hardware peripherals only after they satisfy a predetermined condition, allowing updates without interrupting operations and eliminating the need for rebooting the processing unit.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a reboot of the microcontroller is performed at the end of the update, then the microcode update is completed, but additional downtime of the microcontroller is introduced

Engineering Contradiction:
Improvemicrocode update completionVSAvoidmicrocontroller downtime
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent performs preliminary actions by coordinating the update process with hardware peripherals before the actual microcode update occurs. The method checks whether hardware peripherals are in a safe state (e.g., not executing critical operations) before authorizing the microcode update, thereby eliminating the need for post-update reboots and reducing downtime.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements a feedback mechanism where the system continuously monitors the state of hardware peripherals and uses this information to control the timing of microcode updates. The update is authorized only when feedback from the hardware peripherals indicates a safe state, ensuring update completion while minimizing disruption to operations.

Inventive Principle:
Principle #23Feedback

2Reliability

If an interruption to hardware peripheral programming is performed during the microcode update, then the microcode update is completed, but additional downtime of the microcontroller is introduced

Engineering Contradiction:
Improvemicrocode update completionVSAvoidmicrocontroller downtime
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent performs preliminary verification of the hardware peripheral state before initiating the microcode update. By checking whether peripherals are in a safe state in advance, the system can proceed with the update without interrupting ongoing programming operations, thereby completing the update without additional downtime.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system uses feedback from hardware peripherals to determine whether an interruption is necessary. The update is authorized only when feedback indicates that peripherals are not in the middle of critical programming operations, allowing the update to complete without interrupting hardware peripheral programming and without causing downtime.

Inventive Principle:
Principle #23Feedback

3Loss of time

If reprogramming of hardware peripherals is performed without a reboot, then downtime is reduced, but the operational load of the microcontroller increases permanently

Engineering Contradiction:
Improvemicrocontroller downtimeVSAvoidoperational load
Core Design Contradiction:
Loss of timeVSUse of energy by moving object

Solution Approach 1:

The patent performs preliminary coordination between the microcode update process and hardware peripheral reprogramming. By checking the state of peripherals beforehand and scheduling the update at an appropriate time, the system avoids the need for continuous software-based reprogramming, thereby reducing operational load while maintaining low downtime.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system uses feedback from hardware peripherals to optimize the timing of reprogramming operations. By monitoring peripheral state and authorizing updates only when appropriate, the system minimizes the frequency and duration of reprogramming operations, thereby reducing permanent increases in operational load while maintaining reduced downtime.

Inventive Principle:
Principle #23Feedback

4Loss of time

If reprogramming of hardware peripherals is performed without a reboot, then downtime is reduced, but the complexity of the software increases

Engineering Contradiction:
Improvemicrocontroller downtimeVSAvoidsoftware complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent performs preliminary coordination of the update process with hardware peripheral state. By checking peripheral state in advance and authorizing updates only when appropriate conditions are met, the system simplifies the software logic compared to continuous monitoring and reprogramming approaches, while still achieving reduced downtime.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system uses feedback from hardware peripherals to control the update process, but implements this feedback through a simplified coordination mechanism rather than complex continuous monitoring. The feedback-driven authorization approach reduces software complexity compared to software-based reprogramming while maintaining the benefit of reduced downtime.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS11086622B2Method for managing an update of a microcode within a processing unit
Publication Date: 2021.08.10 STMICROELECTRONICS (ROUSSET) SAS
  • US11086622B2 patent drawing
  • US11086622B2 patent drawing
  • US11086622B2 patent drawing

AI summary

Microcode is stored in a program memory and intended to be executed by a central processing unit of a processing unit. The processing unit may include a memory controller associated with each program memory and a hardware peripheral. The method includes, in response to a request to update the microcode, a transmission, to each hardware peripheral, of a global authorization request signal obtained from an elementary authorization request signal generated by each corresponding memory controller, a transmission of a global authorization signal obtained from an elementary authorization signal generated by each hardware peripheral in response to the global authorization request signal and after satisfying a predetermined elementary condition, and an updating of each microcode by the corresponding memory controller only after the global authorization signal is received.