Microcomputer Power Converter Control Without Logic ICs
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Solution Overview
Problem
Conventional direct power converters require specialized logic ICs like CPLDs or FPGAs for control, which increases hardware complexity and costs, and there is a need for a solution that can control direct power conversion using a microcomputer without these logic ICs.
Innovation Solution
A power converter control device that uses a microcomputer to generate switching signals for both the converter and inverter based on carrier and threshold value comparisons, eliminating the need for logic ICs by employing a single complementary PWM modulator and general-purpose timers to synchronize and control the power conversion process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If specialized logic ICs (CPLD or FPGA) are used for controlling direct power converters, then control functionality is achieved, but hardware complexity and costs increase
Solution Approach 1:
The patent merges the functions of specialized logic ICs into a microcomputer by integrating the carrier wave generation, threshold value comparison, and switching signal generation for both converter and inverter into a single microcomputer unit. This consolidation eliminates the need for separate CPLD or FPGA components while maintaining all necessary control functionalities through software-based implementation.
Solution Approach 2:
The microcomputer is designed to perform multiple functions that were previously handled by dedicated logic ICs. It generates carrier waves, compares threshold values, produces PWM signals, and coordinates both converter and inverter operations using general-purpose processors and timers, demonstrating multi-functionality that replaces specialized hardware.
2Measurement precision
If specialized logic ICs are used for control, then precise synchronization is achieved, but hardware requirements and costs increase
Solution Approach 1:
The patent combines multiple synchronization and control functions into the microcomputer's timer and counter units. The first and second timers generate carrier waves with precise frequency relationships (2:1 ratio), and the comparison units perform synchronized threshold comparisons, all within a single integrated control device rather than requiring separate logic ICs.
Solution Approach 2:
The patent replaces physical logic IC-based synchronization mechanisms with software-based timing and counting operations in the microcomputer. The use of programmable timers, counters, and comparison logic in software allows precise synchronization to be achieved through algorithmic control rather than dedicated hardware circuits.
3Device complexity
If a single complementary PWM modulator is used with general-purpose timers, then hardware is simplified, but control precision must be maintained
Solution Approach 1:
The patent employs parameter-based control strategies where the microcomputer dynamically adjusts timing parameters, carrier frequencies, and threshold values to maintain precision. The first timer operates at twice the frequency of the second timer, and comparison results are used to generate precise PWM signals, ensuring control accuracy is maintained through optimized parameter selection rather than complex hardware.
Data Source
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AI summary
A direct power conversion device is controlled by a microcomputer without using a logic IC. Interrupt handling by an interrupt command (R1[k]) starts, and an interrupt command (R2) occurring concurrently with the interrupt command (R1[k]) is released. Thereafter, second data (Data2[k]) is written into a buffer register (BuffReg). This is performed after transfer of first data (Data1[k]) from the buffer register (BuffReg) to a compare register (CompReg), the transfer being performed at the same timing as occurrence of the interrupt command (R1[k]). Pieces of timing, at which the first data (Data1[k+1]) and the second data (Data2[k+1]) are written into the buffer register (BuffReg), are shifted from each other, whereby pieces of timing, at which these are transferred from the buffer register (BuffReg) to the compare register (CompReg), can be shifted from each other.