Microcomputer Sleep Mode with Non-Volatile Memory Stack
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Solution Overview
Problem
Current methods for transitioning microcomputers into and out of sleep-mode face challenges in power dissipation and firmware complexity, especially as they become more advanced and power-hungry, requiring a way to completely power off to conserve battery life.
Innovation Solution
The system employs a non-volatile memory stack to save system variables, completely powers off the microcomputer, and uses low-power time events and event-triggered devices to power up only when needed, with communication to event devices and internet connectivity to manage configuration updates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the microcomputer uses advanced state of the art performance with large internal memories and vast array of internal peripherals, then the processing speed and functionality are improved, but the power consumption increases even in sleeping modes
Solution Approach 1:
The system segments the microcomputer's operational states into distinct modes: full power mode for processing tasks, sleep mode for data retention, and complete power-off mode for maximum power savings. This segmentation allows the high-performance microcomputer to spend most time in low-power states while maintaining readiness to resume full functionality when needed.
Solution Approach 2:
The patent extracts the essential function of data retention from the main microcomputer body by using external non-volatile memory and event-triggered wake-up mechanisms. This allows the microcomputer to be completely powered off while preserving critical data and event information, separating the processing power function from the continuous operation requirement.
2Use of energy by moving object
If the microcomputer completely powers off to eliminate power dissipation, then power consumption is reduced, but firmware complexity increases to manage sleep transitions and interrupt handling
Solution Approach 1:
The system implements self-service mechanisms where event-triggered devices automatically generate wake-up signals without firmware intervention, and the non-volatile memory automatically preserves data across power cycles. This reduces the firmware's burden in managing sleep transitions, as the hardware autonomously handles data persistence and wake-up triggering.
Solution Approach 2:
The patent applies preliminary action by pre-storing event information and system state in non-volatile memory before power-off. This preliminary data preservation eliminates the need for complex firmware routines to manage data retention during sleep modes, as the data is already secured in a power-independent storage medium.
3Use of energy by moving object
If the microcomputer uses internal circuitry to switch resources on and off for sleep-mode transitions, then power dissipation is reduced, but reliability of sleep entry and exit becomes difficult to ensure
Solution Approach 1:
The patent introduces an intermediary non-volatile memory system that mediates between the microcomputer's power states. This intermediary preserves system state and event information independently of the microcomputer's power status, providing a reliable bridge that ensures consistent and reliable transitions between power states without depending on the microcomputer's internal circuitry.
Data Source
AI summary
Microcomputer with a sleep mode system uses a non-volatile memory stack for saving system variables, then switches the microcomputer completely off to go into sleep-mode. In sleep-mode, the microcomputer sleep mode system uses a low powered clock and sensors to trigger time events and device events that power up the microcomputer when needed. When in awake-mode, the microcomputer logs any data from connected device(s). The microcomputer turns on an internet radio and transmits data logged, updates its clock time and receives any configuration updates before powering back down into sleep-mode.