Microcontroller Bus Controller Cell for CAN Wake-Up Detection
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing hardware solutions for detecting wake-up messages in a Controller Area Network (CAN) require complex processing by the CAN transceiver or system basic chip, increasing technical complexity and power consumption.
Innovation Solution
A method where a microcontroller with a processor unit and a bus controller cell, implemented on a common substrate, operates in sleep mode with the processor unit stopped and the bus controller cell active, storing received bus messages for later evaluation by the processor unit, reducing the need for the transceiver to process wake-up messages and minimizing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the CAN transceiver or system basic chip processes bus messages to detect wake-up messages using hardware solution, then the controller can be woken up reliably, but the technical complexity and power consumption increase
Solution Approach 1:
The patent extracts the wake-up message detection function from the CAN transceiver hardware and relocates it to the microcontroller's processor unit. The bus controller cell continues to operate in a simplified mode during sleep, while the processor unit periodically wakes up to evaluate stored bus messages for wake-up conditions, thereby reducing transceiver complexity while maintaining detection reliability.
Solution Approach 2:
The bus controller cell acts as an intermediary between the transceiver and the processor unit during sleep mode. It receives and stores bus messages in a message buffer without requiring complex processing, allowing the processor unit to evaluate messages periodically without the transceiver needing sophisticated wake-up detection capabilities.
2Reliability
If the transceiver processes and evaluates bus messages to detect wake-up messages, then wake-up detection is achieved, but power consumption increases
Solution Approach 1:
The processor unit operates in periodic cycles, sleeping for extended periods and waking up at predetermined intervals to evaluate bus messages stored by the bus controller cell. This periodic operation significantly reduces average power consumption compared to continuous transceiver processing, while still ensuring reliable wake-up message detection.
Solution Approach 2:
The bus controller cell autonomously performs the function of receiving and storing bus messages during sleep mode without requiring power-intensive processing. This self-service capability allows the system to maintain message buffering functionality while the processor unit remains in low-power state, reducing overall power consumption.
3Use of energy by moving object
If the processor unit is stopped in sleep mode, then power consumption is reduced, but the controller cannot receive or process bus messages
Solution Approach 1:
The controller functionality is segmented into two independent components: the bus controller cell that handles message reception and buffering, and the processor unit that performs evaluation and control. During sleep mode, the bus controller cell remains operational to receive and store messages, while the processor unit is stopped to save power. This segmentation allows the system to maintain message reception capability while reducing power consumption.
Solution Approach 2:
The bus controller cell performs preliminary actions by receiving and storing bus messages in the message buffer before the processor unit wakes up. This preliminary message buffering ensures that when the processor unit becomes active, all relevant messages are already available for evaluation, eliminating the need for continuous processing and enabling reliable wake-up detection.
Data Source
AI summary
Disclosed is a method for operating a controller as a bus participant in a bus network, wherein the controller comprises a microcontroller comprising a processor unit and a bus controller cell, and the processor unit is stopped for a sleep mode. If the processor unit is stopped, the bus controller cell receives bus messages from the bus network, the bus controller cell stores at least some of the received bus messages in a memory, the processor unit is activated at predetermined times and checks whether the memory contains a wake-up message for the controller, and, in this case, the controller changes from the sleep mode to a wake mode, and otherwise the processor unit is stopped again.