Microcontroller Digital Clock Source for Flexible Frequency Scaling
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Solution Overview
Problem
Conventional microcontroller clock schemes lack flexibility in configurability, relying on binary dividers for system and peripheral clock frequencies, which limits user options for optimizing performance and power consumption.
Innovation Solution
A microcontroller with a numerically controlled oscillator (NCO) that receives a reference clock and a numerical value to generate a programmable system clock, allowing selection from internal and external clock signals and enabling digital control of clock frequencies through operations like adding, multiplying, or dividing, thereby providing a flexible and variable clock source.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If binary dividers are used for clock frequency scaling, then the clock generation circuit is simple, but the frequency configurability is limited
Solution Approach 1:
The patent changes the fundamental parameter of frequency generation from binary division to numerical multiplication. The NCO uses a numerical value stored in a register to multiply the reference clock frequency, enabling continuous frequency adjustment rather than discrete binary steps. This parameter change allows fine-grained frequency control while maintaining a relatively simple circuit structure based on standard digital components.
Solution Approach 2:
The patent replaces the mechanical/divider-based frequency scaling approach with a digital numerical control system. Instead of using binary dividers that can only reduce frequency in fixed 2^n steps, the system uses a numerically controlled oscillator that multiplies the reference frequency by a programmable value, substituting rigid mechanical division with flexible digital multiplication.
2Adaptability or versatility
If standard binary divider clock schemes are used, then the circuit structure is simple, but intermediate frequencies cannot be generated
Solution Approach 1:
The patent fundamentally changes the frequency generation parameter from discrete binary division ratios to continuous numerical multiplication factors. By storing a numerical value in a register that can be programmably adjusted, the system can generate any intermediate frequency between the minimum and maximum bounds, not just the discrete frequencies available with binary dividers.
Solution Approach 2:
The patent introduces dynamic frequency adjustment capability through the programmable numerical register. The clock frequency can be dynamically changed by modifying the stored numerical value, allowing the system to adapt to different operating conditions and generate intermediate frequencies on-demand rather than being fixed to predetermined binary division ratios.
3Adaptability or versatility
If binary dividers are used for frequency scaling, then power consumption is low, but frequency selection is limited to discrete values
Solution Approach 1:
The patent changes the frequency control parameter from fixed binary division to programmable numerical multiplication. This allows the system to select from a continuous range of frequencies rather than discrete values, providing fine-grained control for optimizing power consumption at different operating frequencies without being constrained to predetermined binary steps.
Solution Approach 2:
The patent enables dynamic frequency selection through the programmable numerical register, allowing the system to adaptively choose the optimal frequency for different operating conditions. This dynamic control capability permits more precise frequency tuning to minimize power consumption while maintaining the flexibility to operate across a wide frequency range.
Data Source
AI summary
A microcontroller has a numerical controlled oscillator receiving a primary clock signal and is configured to provide an internal system clock of the microcontroller. A method for operating a microcontroller performs the following steps: Selecting a primary clock signal from a plurality of clock signals; feeding the primary clock signal to a numerical controlled oscillator; configuring the numerical controlled oscillator to generate a numerical controlled clock signal; and providing the numerical controlled clock signal as an internal system clock for the microcontroller.