Microcontroller ROM Error Detection via CRC Scanning

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Solution Overview

Problem

Existing memory systems lack effective error detection mechanisms for ROM data stored in microcontrollers, which can lead to reliability issues and potential failures in portable electronic devices.

Innovation Solution

A memory system and method that includes a microcontroller with a control logic, ROM data divider, ROM data scanner, and output circuit, which performs a scanning operation on ROM data using a cyclic redundancy check (CRC) method to detect errors and output a status signal, improving the reliability of the memory system.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If error detection mechanism is added to detect ROM data errors, then reliability is improved, but device complexity increases

Engineering Contradiction:
Improvereliability of memory systemVSAvoidcomplexity of microcontroller structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The error detection function is merged into the existing microcontroller structure by integrating the ROM data scanner and control logic within the microcontroller itself. This allows the microcontroller to autonomously perform scanning operations on its own ROM data without requiring external detection equipment, thereby improving reliability while minimizing the increase in device complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The microcontroller is designed to perform self-diagnosis by scanning its own ROM data. The control logic generates scanning signals that read ROM data, and the same microcontroller evaluates the scanned data for errors. This self-service approach enables error detection without requiring additional external testing equipment, resolving the contradiction between improved reliability and increased device complexity.

Inventive Principle:
Principle #25Self-service

2Measurement precision

If scanning operation is performed on all ROM data, then error detection accuracy is improved, but operation time increases

Engineering Contradiction:
Improveerror detection accuracyVSAvoidtime for scanning operation
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The ROM data is divided into multiple segments or blocks that can be scanned independently. The control logic sequentially scans different portions of ROM data rather than attempting to scan all data simultaneously. This segmentation approach maintains comprehensive error detection accuracy while allowing the scanning operation to be performed in manageable time intervals, thus resolving the contradiction between detection accuracy and operation time.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The scanning operation is implemented as a periodic process where the control logic scans ROM data in repeated cycles. Each cycle scans a portion of the ROM data, and multiple cycles collectively cover the entire ROM space. This periodic scanning approach ensures thorough error detection while distributing the time requirement across multiple operation cycles, balancing accuracy with time efficiency.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS11222698B2Microcontroller, memory system having the same, and method for operating the same
Publication Date: 2022.01.11 SK HYNIX INC
  • US11222698B2 patent drawing
  • US11222698B2 patent drawing
  • US11222698B2 patent drawing

AI summary

There are provided a microcontroller, a memory system having the same, and a method for operating the same. A memory system includes: a semiconductor memory performing a scanning operation on ROM data stored in a microcontroller in a test operation and outputting a result of the scanning operation as a status output signal; and a controller for determining whether an error exists in the ROM data, using the status output signal.