Microcontroller Data Communication Without Slave Clock

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Solution Overview

Problem

In display devices, existing data communication methods like SPI and I2C face challenges in increasing communication speed due to delays, leading to larger circuit sizes and increased power consumption, especially when multiple slaves require clock circuits for data transmission.

Innovation Solution

A microcontroller in the display device transmits data without a clock, using a higher frequency clock for sampling and pattern data to identify start timing, allowing accurate data recovery and reducing the need for clock circuits in slaves.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a slave includes a clock circuit to transmit data with a clock, then data transmission accuracy is improved, but the size of the slave circuit becomes large

Engineering Contradiction:

Improvedata transmission accuracyVSAvoidslave circuit size

Core Design Contradiction:

ReliabilityVSArea of stationary object

Solution Approach 1:

The clock circuit is extracted from the slave device and relocated to the master device. The slave only transmits data without generating clocks, while the master generates clocks for both transmitting its own data and sampling the slave's data, thereby reducing the slave circuit size while maintaining data transmission accuracy through the master's clock circuit.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The master device's clock circuit serves multiple functions: it generates clocks for transmitting master data to the slave and simultaneously generates clocks for sampling and recovering slave data transmitted without clocks. This multi-functionality eliminates the need for separate clock circuits in the slave while ensuring accurate data reception.

Inventive Principle:

Principle #6Universality (Multi-functionality)

2Reliability

If each slave includes a clock circuit for data transmission, then data communication reliability is improved, but the overall power consumption of the display device increases

Engineering Contradiction:

Improvedata communication reliabilityVSAvoidpower consumption

Core Design Contradiction:

ReliabilityVSUse of energy by stationary object

Solution Approach 1:

Multiple clock generation functions are merged into a single clock circuit located in the master device. This single clock circuit serves all slaves and handles both master-to-slave and slave-to-master communication timing, thereby reducing the total number of clock circuits from multiple (one per slave) to one, which significantly reduces overall power consumption while maintaining communication reliability.

Inventive Principle:

Principle #5Merging (Combining)

3Productivity

If communication speed is increased in SPI or I2C scheme, then data transmission efficiency is improved, but delays cause reading errors

Engineering Contradiction:

Improvedata transmission efficiencyVSAvoiddata reading accuracy

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The master device acts as an intermediary that generates and provides clocks to the slave device. This intermediary clock generation at the master side ensures synchronized data transmission and sampling, allowing high-speed communication without the delays that cause reading errors in traditional SPI or I2C schemes where the slave generates its own clock.

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS11367374B2Display device and microcontroller included therein

Publication Date: 2022.06.21 SILICON WORKS CO LTD

AI summary

Disclosed is data communication between a microcontroller and a source readout circuit, in which the clock circuit of a slave is not needed, and the size of a slave circuit and the amount of power consumed may be reduced.