Microcontroller Logic Analysis with FIFO Signal Capture
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Solution Overview
Problem
The challenge in server computer motherboard design and development is the difficulty in quickly identifying signal issues due to limitations in using jumpers and logic analyzers, which can lead to memory overflow and missed observations.
Innovation Solution
A microcontroller with a counting unit, control unit, and buffer unit is integrated into the motherboard to record and store signal states without the need for physical jumpers or external logic analyzers, allowing flexible and unlimited recording time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a logic analyzer with limited memory is used to observe signals, then the observation can be performed, but the allocated memory may be full causing previously valuable data to be overwritten
Solution Approach 1:
The system segments the signal observation function into two parts: a first storage unit (buffer memory) integrated into the microcontroller for continuous local storage, and a second storage unit (external memory or display) for long-term retention or visualization. This segmentation allows the system to overcome the memory limitation of traditional logic analyzers by distributing storage across multiple levels.
Solution Approach 2:
The patent implements a nested storage structure where the first storage unit (buffer) is embedded within the microcontroller, which itself is integrated into the motherboard. This nested arrangement allows the system to layer storage capacities, with the buffer providing immediate capture and the external storage providing extended retention, effectively creating a nested doll structure of storage units with increasing capacity.
2Ease of operation
If jumpers are soldered to connect signals to a logic analyzer, then signal observation is enabled, but the process is time-consuming and requires physical modification
Solution Approach 1:
The microcontroller automatically performs signal capture and storage functions that previously required manual intervention. The system self-services by continuously monitoring signals through its integrated buffer memory without requiring operators to solder jumpers or manually connect logic analyzers, thereby eliminating the time-consuming physical modification process while maintaining ease of operation.
Solution Approach 2:
The microcontroller is designed with multi-functionality, serving both as a control unit and an integrated logic analyzer. By combining signal monitoring, buffering, and storage capabilities within a single universal component, the system eliminates the need for separate logic analyzer hardware and jumper connections, streamlining the debugging process.
3Duration of action of moving object
If the recording time is extended beyond allocated memory, then more signal data can be captured, but the memory will be full and data will be overwritten
Solution Approach 1:
The storage system is segmented into a first storage unit (buffer memory) for continuous cyclic storage and a second storage unit (external memory) for overflow storage. When the buffer is full, the system seamlessly transitions to storing data in the external memory, thereby extending recording duration without overwriting valuable data and maintaining data integrity throughout the extended recording period.
Solution Approach 2:
The buffer memory is pre-configured with sufficient capacity to hold a minimum amount of signal data before external storage is engaged. This preliminary action ensures that critical signal transitions are always captured in the fast buffer, while extended recording periods are handled by the external storage, preventing data loss during the transition.
Data Source
AI summary
A microcontroller, a method, and an electronic system for logic analysis are provided. The microcontroller includes a counting unit, a control unit, and a buffer unit. The counting unit counts with a preset period and outputs a count value. The control unit is coupled to the counting unit and receives a plurality of data and the count value. The buffer unit is coupled to the control unit and performs First In, First Out (FIFO) operations. In response to state transition of at least one datum, the control unit records the current state of the data and the count value and thereby generates transmission data. The control unit then stores the transmission data in the buffer unit.