Microcontroller Interrupt Management Delay Mechanism
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Solution Overview
Problem
Microcontrollers face instability and impaired functionality due to high-frequency interrupt events, which prevent the central processing unit from handling other tasks, particularly in applications like digital tachographs that require processing numerous interrupts quickly.
Innovation Solution
Implementing a microcontroller with an interrupt management unit that introduces a delay time for activating interrupts, allowing the capture-compare unit to temporarily assign interrupts and manage them efficiently, combining interrupt control with time interval control to mitigate high-frequency events without additional programming effort or hardware complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If interrupts are activated immediately upon triggering events, then response speed is improved, but system stability deteriorates under high-frequency events
Solution Approach 1:
The patent implements a periodic action principle by introducing a delay mechanism that controls interrupt activation at specific time intervals. The delay counter increments with each clock cycle and activates the interrupt only when it reaches a predetermined value, transforming immediate interrupt response into a controlled periodic activation. This resolves the contradiction by maintaining system stability through time-based spacing while still providing timely response to triggering events.
2Reliability
If interrupt management uses complex process control to handle high-frequency events, then system stability is improved, but device complexity increases
Solution Approach 1:
The patent employs an intermediary mechanism by introducing a delay counter and control logic that mediates between the interrupt trigger and the actual interrupt activation. This intermediary layer filters high-frequency triggering events through a time-based delay mechanism, allowing the system to handle interrupts in a controlled manner without requiring complex process control. The intermediary delay counter simplifies the overall control structure while maintaining stability.
3Productivity
If additional hardware is added to manage high-frequency interrupts, then processing capability is improved, but manufacturing cost and complexity increase
Solution Approach 1:
The patent applies the universality principle by implementing interrupt delay functionality using existing microcontroller resources. The delay counter can be integrated with existing timer/counter hardware or implemented using general-purpose registers and the system clock. This multi-functional approach allows the same hardware resources to serve both timing functions and interrupt control, eliminating the need for dedicated additional hardware while maintaining enhanced interrupt processing capability.
Data Source
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AI summary
The invention relates to a microcontroller (MC) with integrated functional modules (FM) encompassing a first functional module (FM1) which is configured so as to activate or deactivate interrupts (INT). Also disclosed is a method for operating a microcontroller (MC) of said type. High-frequency triggering events for interrupts are common especially in the preferred field of application of the invention, i.e. the equipment and operation of digital tachographs, because the signal of a speed sensor has to be recorded also at high speeds. This may affect the process stability when other request sequences are processed. In order to prevent this from happening, the first functional module (FM1) deactivates an interrupt (INT) once requests (IRQ) have been processed and activates said interrupt (INT) again following a delay period (IED) that is associated with the interrupt (INT). Said procedure combines the advantages of controlling processes by means of time intervals and the advantages of an interrupt controller.