Microcontroller Jump Instruction Encoding Without Extra NOP Cycles

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Solution Overview

Problem

In microcontroller operations, NOP instructions often result in wasted execution cycles and increased code lines, leading to longer execution times and increased ROM memory usage, as existing solutions either waste NOP instructions or introduce complexity with internal skip signals that are not universally applicable.

Innovation Solution

Duplicating jump instructions to form a new instruction set, allowing execution of subsequent instructions or internal NOP instructions, thereby eliminating the need for additional code lines and optimizing execution time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If NOP instructions are used in microcontroller operations, then code lines increase and execution cycles are wasted, but execution speed decreases and code efficiency deteriorates

Engineering Contradiction:
Improveexecution speedVSAvoidwasted execution cycles
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent extracts and removes NOP instructions from the code by detecting them during assembly and replacing them with optimized jump instructions. The NOP manager unit identifies and eliminates unnecessary NOP instructions, extracting only the essential jump functionality needed for code flow control.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the parameter of jump instruction encoding by introducing a new opcode (0x0E) that combines jump and NOP functionality. This parameter change allows the system to represent jump operations more efficiently, reducing the number of execution cycles required.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If NOP instructions are inserted after jump instructions, then code behavior becomes complex and error-prone, but code complexity increases and management difficulty worsens

Engineering Contradiction:
Improvecode behavior correctnessVSAvoidcode management complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the jump instruction and NOP instruction into a single unified opcode (0x0E). This combining eliminates the need for separate NOP instructions after jump instructions, simplifying code behavior and reducing management complexity while maintaining reliability.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The new opcode 0x0E serves multiple functions: it performs unconditional jumps and simultaneously handles the NOP functionality that would traditionally require separate instructions. This multi-functionality reduces code complexity and eliminates error-prone NOP management.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Productivity

If jump instructions are duplicated to form new instruction sets, then instruction set size increases, but code lines increase and memory usage worsens

Engineering Contradiction:
Improveexecution efficiencyVSAvoidcode lines
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The patent changes the opcode parameter to 0x0E for enhanced jump instructions, allowing them to encode both jump address and NOP suppression functionality in a single byte. This parameter optimization reduces the number of code lines needed compared to traditional separate jump and NOP instructions.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20230195460A1Method performed by a microcontroller for managing a NOP instruction and corresponding microcontroller
Publication Date: 2023.06.22 SK HYNIX INC
  • US20230195460A1 patent drawing
  • US20230195460A1 patent drawing
  • US20230195460A1 patent drawing

AI summary

Disclosed herein is a method for managing of NOP instructions in a microcontroller, the method comprising duplicating all jump instructions causing a NOP instruction to form a new instruction set; inserting an internal NOP instruction into each of the jump instructions; when a jump instruction is executed, executing a subsequent instruction of the new instruction set; and executing the internal NOP instruction when an execution of the subsequent instruction is skipped.