Microcontroller Memory Security via Discontinuity Instruction Detection

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Solution Overview

Problem

Existing methods for detecting attempted linear extraction of memory content in microcontrollers or processors are inefficient and difficult to implement effectively.

Innovation Solution

A method involving the insertion of discontinuity instructions and/or security markers into the program code, which triggers an alert action if not detected, using a predefined monitoring rule, to prevent linear code extraction.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If discontinuity instructions and security markers are inserted into the program code to detect linear extraction attempts, then the security detection capability is improved, but the device complexity increases

Engineering Contradiction:
Improvesecurity detection capabilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by inserting discontinuity instructions and security markers into the program code during the compilation or loading phase, before execution begins. These markers are pre-positioned at specific intervals to automatically trigger detection of linear extraction attempts during normal execution, eliminating the need for additional runtime detection hardware

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system applies self-service by using the program code's own execution mechanism to detect extraction attempts. The existing instruction fetch and execution pipeline naturally encounters the embedded discontinuity instructions and security markers, allowing the system to self-detect attacks without requiring separate monitoring subsystems

Inventive Principle:
Principle #25Self-service

2Measurement precision

If discontinuity instructions are inserted frequently to improve detection reliability, then the detection precision is improved, but the loss of time increases due to more alert actions

Engineering Contradiction:
Improvedetection precisionVSAvoidloss of time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent applies parameter changes by adjusting the interval or density of security markers based on security requirements and performance constraints. The system can modify the frequency of discontinuity instructions to optimize the balance between detection precision and execution time loss, allowing flexible parameter tuning without structural changes

Inventive Principle:
Principle #35Parameter changes

3Measurement precision

If the monitoring rule is made sensitive to detect all extraction attempts, then the detection precision is improved, but the productivity decreases due to more frequent alert actions

Engineering Contradiction:
Improvedetection precisionVSAvoidproductivity
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent applies partial action by implementing a threshold-based monitoring rule that only triggers alert actions when a certain number of discontinuity instructions are missed within a specified window. This partial detection approach reduces false alarms and unnecessary productivity loss while maintaining sufficient detection precision for actual extraction attempts

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS20250190552A1Process for detecting an attempted linear extraction of the content of a memory
Publication Date: 2025.06.12 INSTITUT MINES TELECOM TELECOM BRETAGNE
  • US20250190552A1 patent drawing
  • US20250190552A1 patent drawing
  • US20250190552A1 patent drawing

AI summary

“A method for detecting attempted linear extraction of a program code recorded in a memory (10) of an electronic circuit (1) is provided. The program code instructions that, in order to be read by a microprocessor core (14), are loaded sequentially via an instruction bus (11) into an instruction register (12) for storing the instructions that is controlled at least by a clock signal (clk) and a reset signal (reset). Each instruction is loaded into the instruction register (12) on an edge of the clock signal (clk). The discontinuity instructions code and/or what are referred to as “security marker” instructions are inserted among the program instructions so as to be read during the execution of the program. The method includes triggering a predefined alert action (300) in the event of lack of detection of a discontinuity instruction or of a security marker, in accordance with a predefined monitoring rule.