Microcontroller Power Sequencer Using I2C Registers
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Solution Overview
Problem
Complex computing systems face errors and failures due to improper power-up and power-down sequencing of components, leading to significant costs and downtime, as existing hardware solutions lack timing control and are inflexible for sequence modifications, while software solutions risk critical system failures due to non-critical component errors.
Innovation Solution
A microcontroller-based power and reset sequencer that utilizes I2C register tables to define and manage the sequencing of system power-up and power-down operations, allowing for programmable timing and order changes without replacing hardware, thus isolating critical power management functions from non-critical tasks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If hardware devices such as logic gates are used to turn on each component in a system in a cascade fashion, then the power-up sequence can be implemented, but there is little or no timing control between component activation and the entire hardware device must be replaced if sequence modification is needed
Solution Approach 1:
The patent replaces the traditional hardware-based power-up sequencing mechanism (logic gates and switches) with a software-based microcontroller system. The microcontroller reads a sequence of component addresses from ROM and systematically powers up each component in a predetermined order, enabling flexible sequence modification through software changes rather than hardware replacement.
Solution Approach 2:
The patent introduces dynamic control of the power-up sequence through the microcontroller, which can adapt the sequencing based on system configuration stored in ROM. The system can dynamically adjust which components are powered up and in what order, providing versatility without requiring physical hardware changes.
2Extent of automation
If a baseboard management controller is used to perform the system power up/power down sequence, then the sequencing function is centralized, but the controller is complex with many non-critical jobs and adding additional jobs increases the opportunity for controller bugs or failure
Solution Approach 1:
The patent segments the power-up sequencing function from the baseboard management controller by implementing a dedicated microcontroller unit specifically for this purpose. This separate microcontroller handles only the power-up sequence execution, isolating it from other non-critical management tasks and reducing the overall failure risk associated with a multi-functional controller.
Solution Approach 2:
The patent extracts the power-up sequencing functionality from the complex baseboard management controller and implements it as a standalone microcontroller system. This extraction ensures that failures in the sequencing mechanism do not propagate to other system management functions, thereby improving overall system reliability.
3Device complexity
If components are powered up all at the same time, then no particular device is needed during power up, but errors and total system failures can occur when components are not turned on in the proper order
Solution Approach 1:
The patent implements preliminary action by pre-defining the correct power-up sequence in ROM before the system is powered on. The microcontroller reads this predetermined sequence and executes it automatically, ensuring that components are powered up in the correct order without requiring complex real-time decision-making during the power-up process.
Data Source
AI summary
Embodiments of the invention provide a method and an apparatus for utilizing a microcontroller to provide an automatic order and timing power and reset sequencer. A first inter-integrated circuit (I2C) register table containing a modifiable system power-up sequence is accessed. An automatic system power-up operation is then performed in the order of the power-up sequence defined by the first I2C register table.