Microcontroller Peripheral State Retention for Low-Power Wake-Up
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Solution Overview
Problem
Microcontrollers face excessive power consumption during inactivity or low usage periods due to undesired power consumption by internal peripherals, leading to tradeoffs between power reduction, user experience, and application complexity.
Innovation Solution
A power-saving system that includes retention and non-retention flip flops, with a controller managing power modes by delivering save and reset signals to maintain logic states of retained peripherals using a low-power source during enhanced power-saving modes, decoupling peripherals from the main power source to minimize power usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the microcontroller switches to low-power mode to reduce power consumption, then power usage is reduced, but logic states of peripherals are lost requiring system reset and initialization
Solution Approach 1:
The patent segments the power supply architecture into two distinct power sources: a main power source for full operation and a retained power source for power-saving mode. This segmentation allows selective powering of critical components (flip-flops storing logic states) while disconnecting non-critical peripherals, enabling the system to maintain essential logic states during low-power mode without requiring full system reset.
Solution Approach 2:
The patent applies local quality by providing different power supply conditions to different parts of the system. The retained power source provides minimal power specifically to the flip-flops and critical peripherals needed to maintain logic states, while the main power source is disconnected from non-essential components. This localized power distribution preserves necessary information while minimizing overall power consumption.
2Loss of time
If the microcontroller maintains logic states during power-saving mode, then wake-up time is reduced, but power consumption increases compared to complete shutdown
Solution Approach 1:
The patent implements partial action by providing just enough power (retained power source) to maintain logic states in flip-flops during power-saving mode, rather than providing full power to all components. This minimal power supply is sufficient to preserve logic states and enable quick wake-up, while consuming significantly less power than full operation, achieving an optimal balance between wake-up speed and power consumption.
3Use of energy by moving object
If the microcontroller resets non-retained peripherals during enhanced power-saving mode, then power consumption is minimized, but application complexity increases
Solution Approach 1:
The patent applies preliminary action by automatically resetting non-retained peripherals when transitioning to enhanced power-saving mode and automatically restoring them when exiting power-saving mode. This preliminary preparation and automatic management of peripheral states reduces the need for complex application-level power management code, as the hardware itself handles the complexity of power state transitions and peripheral initialization.
Data Source
AI summary
A power-saving system includes a retention memory element for a retained peripheral that is set to a logic state during an operational-power mode and maintains the logic state during an enhanced power-saving mode. The power-saving system also includes a non-retention memory element for a non-retained peripheral that is set to a logic state during the operational-power mode of the power-saving system; and a controller that instructs the retention memory element to maintain its logic state while in an enhanced power-saving mode.