Programmable Microcontroller for Secure Video Decryption

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Solution Overview

Problem

Existing mobile devices face complexity, security vulnerabilities, and high power consumption due to their reliance on fixed hardware for video encryption and decryption, which limits flexibility and efficiency in handling various encryption schemes.

Innovation Solution

A programmable microcontroller is integrated into the GPU pipeline to support flexible encryption schemes and accelerate video stream parsing, allowing for hardware-accelerated processing without CPU involvement, thereby reducing the need for external hardware and minimizing data copying between secure and insecure memory regions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If fixed hardware is used for video encryption and decryption, then security is provided, but device complexity and power consumption increase

Engineering Contradiction:

ImprovesecurityVSAvoiddevice complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the video decoding and decryption functions into a single integrated hardware module. The decoder is configured to perform both video decoding and decryption operations, eliminating the need for separate hardware components and reducing overall device complexity while maintaining security

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The decoder is designed as a multi-functional unit that can handle multiple encryption schemes (AES-CTR, AES-CBC, RSA, etc.) and video formats. This universal design allows a single hardware component to perform various encryption and decryption operations, reducing the need for multiple specialized hardware modules

Inventive Principle:

Principle #6Universality (Multi-functionality)

2Reliability

If fixed hardware is used for video encryption and decryption, then security is provided, but power consumption increases

Engineering Contradiction:

ImprovesecurityVSAvoidpower consumption

Core Design Contradiction:

ReliabilityVSUse of energy by moving object

Solution Approach 1:

By combining decoding and decryption into one integrated module, the patent eliminates redundant data transfers and processing steps between separate components. This consolidation reduces the overall power consumption while maintaining the security benefits of hardware-based encryption

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The decoder is pre-configured with support for multiple encryption schemes and can automatically select the appropriate decryption method based on the input content. This preliminary configuration eliminates the need for runtime reconfiguration and reduces processing overhead, thereby lowering power consumption

Inventive Principle:

Principle #10Preliminary action

3Reliability

If fixed hardware is used for video encryption and decryption, then security is provided, but flexibility and efficiency in handling various encryption schemes decrease

Engineering Contradiction:

ImprovesecurityVSAvoidflexibility

Core Design Contradiction:

ReliabilityVSAdaptability or versatility

Solution Approach 1:

The decoder incorporates a universal decryption engine that supports multiple encryption schemes including AES-CTR, AES-CBC, RSA, and others. The hardware is designed to adapt to different encryption algorithms through configurable parameters and lookup tables, providing both security and flexibility

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The decoder includes dynamic configuration capabilities that allow it to adapt to different encryption schemes based on the input content. The hardware can switch between different decryption algorithms and adjust its operation mode according to the specific requirements of the content being processed

Inventive Principle:

Principle #15Dynamics

4Adaptability or versatility

If CPU involvement is used in video decryption, then flexibility is maintained, but processing speed and power efficiency decrease

Engineering Contradiction:

ImproveflexibilityVSAvoidprocessing speed

Core Design Contradiction:

Adaptability or versatilityVSProductivity

Solution Approach 1:

The patent introduces a dedicated hardware decoder as an intermediary component between the secure memory (containing encrypted content) and the display pipeline. This intermediary handles all decryption operations in hardware, eliminating the need for CPU involvement and enabling parallel processing while maintaining flexibility through configurable decryption algorithms

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS10104342B2Techniques for secure provisioning of a digital content protection scheme

Publication Date: 2018.10.16 INTEL CORP

AI summary

Techniques for improved decryption of an encrypted media stream are described. In one embodiment, a system may include a receiver to receive an encrypted media stream, an extraction module to extract an encryption characteristic of the encrypted media stream, a first processor to produce configuration commands from the extracted encryption characteristic, a second processor to receive the encrypted media stream and the configuration commands, and to produce decrypted media based upon a decryption scheme indicated by the configuration commands, and a key distribution module, to distribute a decryption key to the second processor.