Low-Temperature Microdevice Bonding for Misalignment-Tolerant Integration

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Solution Overview

Problem

Existing methods for integrating microdevices into system substrates face challenges with misalignment defects and unwanted shorts due to thermal expansion of connection pads, which can lead to inefficient bonding and compromised performance of microdevices such as LEDs and sensors.

Innovation Solution

A method involving a bonding process where microdevices are coupled to system substrates using pads shielded by a dielectric layer, with a planarization layer and VIA openings, and a third electrode larger than the VIA to accommodate misalignment, and for vertical microdevices, dielectric layers are used to create VIA openings on the sidewalls and top surfaces for secure integration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional bonding methods are used to integrate microdevices into system substrates, then bonding can be achieved, but misalignment defects and unwanted shorts occur due to thermal expansion of connection pads

Engineering Contradiction:
Improvebonding qualityVSAvoidalignment precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by forming a low-temperature sintered bump structure before the bonding process. The bump includes a core material with low thermal expansion coefficient that is prepared in advance, which then serves to compensate for thermal expansion during subsequent bonding, preventing misalignment defects and shorts.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the thermal expansion parameter by using a core material with low thermal expansion coefficient. This parameter change allows the bump to maintain dimensional stability during thermal cycling, compensating for pad expansion and preventing alignment errors during bonding.

Inventive Principle:
Principle #35Parameter changes

2Strength

If thermal bonding processes are used, then bonding strength can be achieved, but thermal expansion causes misalignment and shorts

Engineering Contradiction:
Improvebonding strengthVSAvoidthermal expansion effects
Core Design Contradiction:
StrengthVSObject-affected harmful factors

Solution Approach 1:

The patent changes the thermal expansion parameter by selecting a core material with low thermal expansion coefficient. This allows the bump to remain dimensionally stable during thermal bonding processes, preventing misalignment and shorts while still achieving strong bonding through the low-temperature sintering process.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent uses composite materials by creating a bump structure with a core material surrounded by a shell material. The core material has low thermal expansion coefficient to compensate for pad expansion, while the shell material provides bonding functionality. This composite structure resolves the contradiction between achieving bonding strength and avoiding thermal expansion effects.

Inventive Principle:
Principle #40Composite materials

3Ease of manufacture

If standard pad structures are used without shielding, then bonding process is simple, but unwanted shorts occur due to thermal expansion

Engineering Contradiction:
Improvebonding process simplicityVSAvoidelectrical isolation
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent applies preliminary action by forming a dielectric shield layer around the bump structure before bonding. This shield is prepared in advance to provide electrical isolation, preventing shorts while maintaining process simplicity. The low-temperature sintering process is also performed in advance, allowing for reliable bonding without complex real-time control during the bonding step.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach minimizes misalignment defects and prevents shorts by controlling thermal expansion, enhancing the bonding strength and maintaining the light profile and functionality of microdevices like LEDs and sensors.

Implementation Method 1

minimize misalignment defects and prevents shorts by controlling thermal expansion

Methodology Applied
Scientific EffectThermal expansion control: Thermal Expansion

Implementation Method 2

the connection pads are adhered to a pad on the system substrate at a temperature that is below the melting point of the materials on the pads of system substrate and microdevice pads

Methodology Applied
Scientific EffectLow temperature bonding:

Implementation Method 3

The system substrate with integrated microdevices is heated to a temperature to form an alloy between the pads material on the system substrate and microdevice pads

Methodology Applied
Scientific EffectAlloying:

Data Source

PatentUS20230395560A1Low temperature bonding of microdevice integration into a system substrate
Publication Date: 2023.12.07 VUEREAL INC
  • US20230395560A1 patent drawing
  • US20230395560A1 patent drawing
  • US20230395560A1 patent drawing

AI summary

This disclosure is related to integrating microdevices into a system substrate. In particular the microdevices are transferred from a donor substrate into a system backplane where the microdevices connection pads are adhered to a pads on the system substrate at a temperature that is below the melting point of the materials on the pads of the system substrate and microdevice pads. The present disclosure also relates to integrating vertical microdevices into a system substrate. The system substrate can have a backplane circuit as well. The integration covers the microdevices with dielectrics and couples the backplane through a VIA. The disclosure further relates to a method and structure of microdevice or optoelectronic devices that allows for misalignment adjustment. The microdevices comprise a stack of semiconductor layers that in configuration with electrodes, substrate, VIA's and size factors minimize misalignment.