Microelectronic Assembly With Compliant Dielectric Layer
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Solution Overview
Problem
Microelectronic assemblies face reliability issues due to mechanical stress caused by thermal cycling, as semiconductor chips and substrates expand and contract at different rates, leading to deformation and breakage of electrical interconnections.
Innovation Solution
A microelectronic assembly design featuring a substrate with a compliant dielectric layer and a rigid layer, where the compliant layer has a Young's modulus less than 2 GPa and the rigid layer has a modulus at least 50% greater, allowing for relative movement of terminals with respect to substrate contacts, thereby reducing mechanical stress.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a chip and substrate are formed from different materials having different coefficients of thermal expansion, then electrical interconnection is achieved, but mechanical stress and deformation occur during thermal cycling
Solution Approach 1:
The patent introduces a dielectric layer with specifically controlled mechanical properties (Young's modulus between 2-10 GPa) and thermal properties (coefficient of thermal expansion between 50-150 ppm/°C) to change the parameter set of the interconnection structure, enabling it to accommodate thermal expansion differences while maintaining reliability
Solution Approach 2:
The patent uses a composite structure consisting of the dielectric layer combined with conductive interconnection structures, where the dielectric layer acts as a stress-absorbing component that complements the conductive elements, creating a composite material system that resists thermal cycling stresses
2Power
If the chip temperature increases rapidly during operation, then power dissipation is managed, but differential thermal expansion causes contact movement and stress
Solution Approach 1:
The dielectric layer's specific thermal and mechanical parameters enable it to expand and contract in a controlled manner during power cycling, absorbing differential expansion forces and maintaining contact stability despite rapid temperature changes
Solution Approach 2:
The dielectric layer is positioned beforehand to act as a cushioning element between the chip and substrate, preemptively absorbing thermal stresses before they can cause contact deformation or breakage during operation
3Duration of action of stationary object
If repeated thermal cycling occurs during device operation, then device functionality is maintained, but electrical interconnections deform and may break
Solution Approach 1:
The dielectric layer's mechanical parameters (Young's modulus of 2-10 GPa) are specifically selected to provide sufficient flexibility for repeated cycling while maintaining structural integrity, enabling long-term operation without interconnection failure
Solution Approach 2:
The dielectric layer continuously absorbs and dissipates thermal stresses throughout the device's operational lifetime, maintaining the integrity of electrical interconnections through repeated thermal cycles and ensuring continuous reliable operation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design effectively reduces mechanical stress and enhances the reliability of electrical connections by accommodating differential thermal expansion, preventing breakage and improving the assembly's performance over repeated thermal cycles.
Implementation Method 1
the chip and substrate ordinarily expand and contract by different amounts
Implementation Method 2
a compliant dielectric layer having a Young's modulus less than two gigapascal (GPa) and a rigid layer
Implementation Method 3
reducing mechanical stresses between the device terminals and external contacts
Data Source
AI summary
A microelectronic assembly may include a substrate containing a dielectric element having first and second opposed surfaces. The dielectric element may include a first dielectric layer adjacent the first surface, and a second dielectric layer disposed between the first dielectric layer and the second surface. A Young's modulus of the first dielectric layer may be at least 50% greater than the Young's modulus of the second dielectric layer, which is less than two gigapascal (GPa). A conductive structure may extend through the first and second dielectric layers and electrically connect substrate contacts at the first surface with terminals at the second surface. The substrate contacts may be joined with contacts of a microelectronic element through conductive masses, and a rigid underfill may be between the microelectronic element and the first surface. The terminals may be usable to bond the microelectronic assembly to contacts of a component external to the microelectronic assembly.


