3D Microelectronic Heat Sink Layout for Logic Hotspots
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional processing conditions and configurations of control logic devices in microelectronic devices, such as memory devices, limit size reduction and performance improvements due to heat dissipation issues and undesirable thermal characteristics.
Innovation Solution
Incorporating heat sink structures within the control logic and memory array structures to facilitate heat dissipation, using materials with high thermal conductivity, and bonding techniques to integrate these structures separately before combining them to form a microelectronic device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If control logic devices are integrated with memory array structure using conventional processing conditions, then device integration is achieved, but heat dissipation capability deteriorates and thermal characteristics worsen
Solution Approach 1:
The control logic structure and memory array structure are formed as separate structures that are subsequently bonded together. This segmentation allows independent optimization of each structure's thermal characteristics while achieving integrated functionality, resolving the contradiction between integration and heat dissipation.
Solution Approach 2:
A bonding interface is introduced as an intermediary between the control logic structure and memory array structure. This bonding interface can be designed with specific thermal properties to facilitate heat dissipation while maintaining electrical and mechanical connections, thus resolving the thermal characteristics issue.
2Volume of moving object
If device size is reduced by decreasing dimensions of control logic devices, then integration density improves, but heat dissipation capability deteriorates
Solution Approach 1:
The patent transitions from planar integration to three-dimensional vertical stacking, where control logic structure and memory array structure are bonded in the vertical dimension. This allows reduced horizontal footprint while maintaining adequate thermal pathways in the vertical direction through the bonding interface.
3Ease of manufacture
If conventional bonding techniques are used to integrate control logic and memory array structures, then manufacturing simplicity is maintained, but thermal conductivity at the bonding interface deteriorates
Solution Approach 1:
The bonding process parameters are specifically optimized to achieve both mechanical bonding and thermal conductivity requirements. By controlling bonding temperature, pressure, and duration, the patent achieves adequate thermal conductivity at the bonding interface while maintaining manufacturing feasibility.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The integration of heat sink structures enhances heat dissipation, allowing for reduced device size and improved performance by maintaining thermal stability and efficiency.
Implementation Method 1
a heat sink structure vertically underlying and horizontally overlapping the high-power component, the heat sink structure comprising a material having higher thermal conductivity than semiconductor material of the control logic structure
Data Source
AI summary
A microelectronic device includes a control logic structure including a high-power component. The microelectronic device also includes a memory array structure vertically offset from and attached to the control logic structure, the memory array structure comprising an array of memory cells. The microelectronic device further includes a heat sink structure vertically underlying and horizontally overlapping the high-power component, the heat sink structure comprising a material having higher thermal conductivity than semiconductor material of the control logic structure.


