Microelectronic Package Terminal Arrangement for Stub Minimization
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Solution Overview
Problem
Conventional microelectronic packages occupy a larger area than necessary due to the arrangement of terminals, which hinders the compact integration of semiconductor chips in portable devices and data servers, leading to increased size and reduced electrical performance.
Innovation Solution
A microelectronic package design with a substrate having terminals arranged in a central region and peripheral regions, where the terminals are configured to carry address information and other signals, reducing the length of electrical connections and improving electrical performance by minimizing stub lengths between packages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If terminals are arranged in conventional peripheral regions, then ease of manufacture is improved, but area occupied by the package increases
Solution Approach 1:
The patent moves terminals from the traditional peripheral arrangement (2D boundary arrangement) to a central region arrangement, utilizing the central area of the substrate that was previously unused or underutilized. This dimensional repositioning allows terminals to be placed in the central region rather than only at the periphery, reducing the overall package area while maintaining manufacturability through standardized substrate design processes.
Solution Approach 2:
The substrate is divided into distinct functional regions: a central region containing terminals and pad structures, and peripheral regions for other components. This segmentation allows the terminal structures to be concentrated in the central area, reducing the area occupied by the package while maintaining ease of manufacture through region-specific optimization of each substrate area.
2Reliability
If electrical connections are made with longer stub lengths, then ease of connection is improved, but electrical performance deteriorates
Solution Approach 1:
The terminal pad structures are pre-configured in the central region with optimized geometries and positions before final assembly. This preliminary arrangement of terminals in the central region enables shorter connection paths to be established during assembly, reducing stub lengths and improving electrical performance while maintaining ease of connection through pre-planned terminal locations.
3Productivity
If package area is reduced for compact integration, then productivity is improved, but device complexity increases
Solution Approach 1:
Multiple functional elements are merged into the central region of the substrate, including terminals, pad structures, and connection points. This consolidation of functions in the central area reduces the overall package area, enabling compact integration while managing device complexity through functional integration rather than spatial distribution.
Data Source
AI summary
A microelectronic assembly (300) or system (1500) includes at least one microelectronic package (100) having a microelectronic element (130) mounted face up above a first surface (108) of a substrate (102), one or more columns (138, 140) of contacts (132) extending in a first direction (142) along the microelectronic element front face. Columns (104A, 105B, 107A, 107B) of terminals (105 107) exposed at a second surface (110) of the substrate extend in the first direction. First terminals (105) exposed at surface (110) in a central region (112) thereof having width (152) not more than three and one-half times a minimum pitch (150) of the columns of terminals can be configured to carry address information usable to determine an addressable memory location. An axial plane of the microelectronic element can intersect the central region.