Microfluidic Chip Channel Geometry for High-Pressure Reactor Integrity

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Solution Overview

Problem

Microfluidic chips used in reactor systems for high-pressure applications are prone to delamination and cracking, leading to leakage and safety risks, and existing solutions are complex and time-consuming due to the need for pressurizing large volumes and detecting leaks.

Innovation Solution

A reactor system with a planar microfluidic chip having a chip inlet channel and outlet channels with diameters less than their lengths, integrated into a chip holding vessel with a fluid supply and discharge system that minimizes pressure on the chip, allowing for efficient fluid distribution and leak detection without active pressurization, using a flow splitter or flow path controller to manage pressurized fluid flow.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If microfluidic chips are used in high-pressure reactor systems, then fluid distribution efficiency is improved, but the chips become prone to delamination and cracking leading to leakage

Engineering Contradiction:
Improvefluid distribution efficiencyVSAvoidchip integrity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent changes the dimensional parameters of the chip channels, specifically ensuring that the diameter of inlet and outlet channels is equal to or less than their length. This parameter optimization reduces stress concentration and prevents cracking while maintaining efficient fluid distribution capability

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent implements a chip holding vessel that provides mechanical support and protection to the microfluidic chip before pressure is applied. This protective structure prevents delamination and cracking by distributing pressure evenly across the chip surface, addressing reliability issues before they occur

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

2Reliability

If connections are glued to prevent leakage, then sealing reliability is improved, but chip exchangeability deteriorates

Engineering Contradiction:
Improvesealing reliabilityVSAvoidchip exchangeability
Core Design Contradiction:
ReliabilityVSEase of repair

Solution Approach 1:

The patent introduces a chip holding vessel as an intermediary component that provides sealing through a seal element rather than gluing the chip directly. This allows the chip to be easily exchanged while maintaining reliable sealing, as the seal element remains in the holding vessel rather than being attached to the chip

Inventive Principle:
Principle #24Intermediary (Mediator)

3Measurement precision

If large volumes are pressurized for leak detection, then detection accuracy is improved, but process complexity and time increase

Engineering Contradiction:
Improveleak detection accuracyVSAvoidpressurization process complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent extracts the leak detection function from the main reactor system by providing a separate detection conduit that connects to the chip holding vessel. This allows leak detection to be performed on a small, isolated volume rather than requiring pressurization of the entire system, reducing complexity while maintaining detection accuracy

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS10549253B2Reactor system for high throughput applications
Publication Date: 2020.02.04 AVANTIUM TECH
  • US10549253B2 patent drawing
  • US10549253B2 patent drawing
  • US10549253B2 patent drawing

AI summary

A reactor system for high throughput applications includes a plurality of reactor assemblies, each reactor assembly including: a fluid source, which fluid source is adapted to provide a pressurized fluid to the flow-through reactors, a flow splitter which flow splitter includes a planar microfluidic chip, which microfluidic chip has a chip inlet channel and a plurality of chip outlet channels, which microfluidic chip further includes a plurality of flow restrictor channels, where each flow restrictor channel extends from said chip inlet channel to an associated chip outlet channel, where the chip inlet channel and the chip outlet channels each have a diameter, where the diameter of the chip inlet channel is the same or less than the length of said chip inlet channel and where the diameter of each chip outlet channel is the same or less than the length of said chip outlet channel.