Microfluidic Chip Assembly Liquid-Tight Seal Carrier
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Solution Overview
Problem
Current microfluidic analysis systems face challenges in minimizing the use of costly materials like silicon for chip production and efficiently integrating chips with carrier plates, which hinders cost-effectiveness and precision in microfluidic analysis.
Innovation Solution
A chip assembly is developed where the chip is secured to a carrier structure with a liquid-tight seal, featuring a hole coaxially aligned with the carrier's aperture, allowing for reduced chip dimensions and the use of less expensive materials for the carrier, while maintaining precision and functionality for microfluidic analysis.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If chips are made from silicon wafers using traditional cutting methods, then manufacturing precision and purity are maintained, but material costs and manufacturing complexity increase
Solution Approach 1:
The system separates the chip from the carrier plate, allowing the chip to be a small, simple component that can be manufactured with minimal complexity while the carrier plate provides the structural framework. This segmentation enables the chip to be produced more simply without compromising overall system precision.
Solution Approach 2:
A liquid-tight seal acts as an intermediary between the chip and carrier plate, ensuring fluid containment and measurement precision without requiring the chip itself to be complex or large. The seal mediates the connection, maintaining purity and precision while allowing simpler chip manufacturing.
2Manufacturing precision
If larger chip dimensions are used, then manufacturing purity is easier to maintain, but material costs and device complexity increase
Solution Approach 1:
The measurement system is divided into a small chip component and a larger carrier plate. The chip only needs to be small enough to fit in the aperture, not large enough to compromise purity on its own. The carrier plate provides the necessary structural context, allowing minimal silicon usage while maintaining purity.
Solution Approach 2:
The small chip is nested within the larger carrier plate structure. The chip fits into the aperture of the carrier plate, creating a nested configuration where the smaller chip benefits from the larger carrier's structural support and fluid containment, eliminating the need for the chip to be larger for structural reasons.
3Ease of manufacture
If chips are integrated directly into carrier plates without seals, then manufacturing is simpler, but liquid-tight sealing and measurement precision are compromised
Solution Approach 1:
A liquid-tight seal is introduced as an intermediary component between the chip and carrier plate. This seal ensures fluid containment and measurement precision without requiring complex direct integration. The seal can be applied simply while maintaining the necessary precision for electrophysiological measurements.
Solution Approach 2:
The liquid-tight seal functions as a thin film or flexible barrier that conformally seals the interface between chip and carrier plate. This approach achieves precise sealing without rigid, complex integration structures, maintaining both manufacturing simplicity and sealing precision.
4Manufacturing precision
If expensive silicon materials are used for the entire assembly, then chip purity and functionality are ensured, but overall cost increases
Solution Approach 1:
The system segments the expensive silicon chip from the cheaper carrier plate material. Only the small chip requires high-purity silicon, while the larger carrier plate can be made from less expensive materials. This segmentation dramatically reduces overall material cost while maintaining chip purity and functionality.
Solution Approach 2:
High-purity silicon is applied locally only where necessary (in the small chip), while the carrier plate uses different, less expensive materials. This local quality approach ensures chip purity where critical for measurements while minimizing overall material cost through strategic material selection.
Data Source
AI summary
A chip assembly for use in a microfluidic analysis system, such as a patch clamp apparatus, comprises a chip having an outer wall, a carrier structure comprising an aperture for receiving the chip, the aperture defining an inner wall, wherein the chip is arranged in the aperture with a liquid tight seal between the outer wall of the chip and the inner wall of the aperture. The chip may be sealed and bonded to the carrier structure by means of a bonding material, such as an UV curing adhesive. A through hole in the chip is aligned with the aperture in the carrier structure. A method for manufacturing the chip assembly is further disclosed.