Sacrificially Plugged Microfluidic Vias for High-Density Wafer Processing

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Solution Overview

Problem

Conventional methods struggle to create high-density fluidic vias in microfluidic chips due to challenges in etching through thin wafers, brittleness, and fluid wicking during semiconductor manufacturing, which impede the integration of nanoscale deterministic lateral displacement arrays for biological sample processing.

Innovation Solution

The use of sacrificial plugs within fluidic vias to protect them during manufacturing, allowing for precise formation and subsequent removal to enable fluid communication, using a via-first manufacturing method that includes depositing a removable material and employing dry debonding processes to maintain via integrity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional etching processes are used to create small diameter vias, then via depth to diameter ratio becomes greater than 1:10 which is challenging to create, but using thin substrates to etch completely through creates brittleness and damage during manufacturing

Engineering Contradiction:
Improvevia formation precisionVSAvoidsubstrate strength
Core Design Contradiction:
Manufacturing precisionVSStrength

Solution Approach 1:

The patent applies preliminary action by forming the vias through the substrate before thinning the substrate to its final thin profile. This sequence allows the vias to be created when the substrate is still thick and strong enough to withstand the etching process, avoiding the brittleness issues that would occur if vias were formed after thinning. The via formation occurs at an earlier stage when mechanical support is adequate.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent inverts the conventional manufacturing sequence by reversing the order of via formation and substrate thinning. Instead of thinning first then creating vias (which causes brittleness), the patent creates vias first through the thicker substrate, then thins the substrate afterward. This inversion resolves the contradiction by performing the mechanically demanding via formation step when the substrate has sufficient strength.

Inventive Principle:
Principle #13The other way round (Inversion)

2Manufacturing precision

If vias are formed at high density in thin wafers, then fluidic accessibility is achieved, but wet processing during manufacturing causes fluid wicking and capillary wetting that renders the device unusable

Engineering Contradiction:
Improvevia density and placement precisionVSAvoidfluid wicking and capillary wetting
Core Design Contradiction:
Manufacturing precisionVSObject-affected harmful factors

Solution Approach 1:

The patent applies preliminary action by forming the high-density via array before performing wet processing steps. The vias are created and positioned with high precision early in the manufacturing process, allowing subsequent wet processing to occur without causing fluid wicking into the vias, as the vias are already formed and can be protected or sealed at this stage.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent segments the manufacturing process into distinct stages: via formation stage, thinning stage, and wet processing stage. By separating via formation from wet processing and arranging them in a specific sequence, the patent prevents the harmful interaction where wet processing would cause fluid to wick into the vias. The process segmentation allows each step to be optimized independently.

Inventive Principle:
Principle #1Segmentation

3Manufacturing precision

If thin wafers are used to enable small diameter vias, then high density via placement is possible, but the thin wafers become too brittle to debond from carrier wafers after polishing

Engineering Contradiction:
Improvevia placement densityVSAvoidwafer debonding ease
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The patent applies preliminary action by completing via formation while the substrate is still relatively thick and supported by the carrier wafer. This allows the high-density via placement to be achieved with precise positioning before the substrate is thinned to its final profile. The via formation occurs at an earlier stage when mechanical support from the carrier wafer provides adequate strength.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent inverts the conventional sequence by forming vias first through the thicker substrate, then thinning the substrate afterward, and finally debonding from the carrier wafer. This inversion allows the substrate to maintain sufficient thickness and strength during via formation and carrier bonding, while enabling debonding to occur after thinning when the device is complete but still supported by the carrier structure.

Inventive Principle:
Principle #13The other way round (Inversion)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the production of microfluidic chips with high-density vias that withstand manufacturing processes without degradation, facilitating precise via placement and high-throughput operations while preventing fluid contamination.

Implementation Method 1

Wet processes can wick these fluids into the microfluidic device through capillary action, rendering the device unusable

Methodology Applied
Scientific EffectCapillary action: Capillary Action

Data Source

PatentUS12502666B2Microfluidic chips with one or more vias filled with sacrificial plugs
Publication Date: 2025.12.23 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US12502666B2 patent drawing
  • US12502666B2 patent drawing
  • US12502666B2 patent drawing

AI summary

Techniques regarding microfluidic chips with one or more vias filled with sacrificial plugs and/or manufacturing methods thereof are provided herein. For example, one or more embodiments described herein can comprise an apparatus, which can comprise a silicon device layer of a microfluidic chip comprising a plurality of vias extending through the silicon device layer. The plurality of vias comprise greater than or equal to about 100 vias per square centimeter of a surface of the silicon device layer and less than or equal to about 100,000 vias per square centimeter of the surface of the silicon device layer. Additionally, the apparatus can comprise a plurality of sacrificial plugs positioned in the plurality of vias.