Micro-LED Array Substrate Electrode Stack for Oxidation Resistance

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Solution Overview

Problem

The electrode layer of micro light-emitting diode (Micro-LED) backplanes is prone to oxidation during manufacturing, leading to yield decrease and quality reduction.

Innovation Solution

An array substrate design with a metal sub-layer and a conductive sub-layer, where the conductive sub-layer is made of copper-nickel alloy, providing oxidation resistance, and includes a first buffer metal layer to improve the electrode layer's morphology and adhesive force.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a simple metal electrode layer is used, then the manufacturing process is simple and cost is low, but the electrode layer is prone to oxidation resulting in yield decrease and quality reduction

Engineering Contradiction:
Improveoxidation resistanceVSAvoidelectrode layer structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The electrode layer is constructed as a composite structure with a metal sub-layer (copper) providing electrical conductivity and a conductive sub-layer (copper-nickel alloy) providing oxidation resistance. This composite structure resolves the contradiction by combining materials with complementary properties, achieving both reliability through oxidation resistance and maintaining reasonable device complexity through a systematic multi-layer design.

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The electrode layer is segmented into distinct functional sub-layers: a metal sub-layer for electrical conductivity and a conductive sub-layer for oxidation resistance. This segmentation allows each layer to perform its specific function optimally, resolving the contradiction between simplicity and reliability by clearly defining functional boundaries while maintaining an integrated structure.

Inventive Principle:
Principle #1Segmentation

2Manufacturing precision

If a multi-layer electrode structure with buffer metal layer is used, then the adhesive force and morphology are improved, but the manufacturing process becomes more complex

Engineering Contradiction:
Improvemorphology and adhesive forceVSAvoidmanufacturing process
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

A buffer metal layer is introduced at the interface between the metal sub-layer and conductive sub-layer to locally improve adhesive force and morphology where it is most needed. This local quality enhancement resolves the contradiction by applying additional structural complexity only where required for optimal performance, rather than uniformly throughout the entire electrode structure.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design enhances the yield and quality of the array substrate by preventing oxidation and ensuring stable electrical connections.

Implementation Method 1

the conductive sub-layer having oxidation resistance and covering the metal sub-layer

Methodology Applied
Scientific EffectOxidation resistance: Oxidation

Data Source

PatentUS12471424B2Array substrate and manufacturing method therefor, display panel, and backlight module
Publication Date: 2025.11.11 BEIJING BOE TECH DEV CO LTD
  • US12471424B2 patent drawing
  • US12471424B2 patent drawing
  • US12471424B2 patent drawing

AI summary

An array substrate and a manufacturing method therefor, a display panel, and a backlight module, are provided. The array substrate may comprise a base substrate, a metal wiring layer, a first planarization layer, an electrode layer, a second planarization layer, and a functional device layer stacked in sequence. The electrode layer comprises a metal sub-layer and a conductive sub-layer stacked on one side of the base substrate in sequence; the material of the metal sub-layer comprises a metal or a metal alloy; the conductive sub-layer has an oxidation resistance and covers the metal sub-layer. The functional device layer is disposed on the side of the second planarization layer distant from the base substrate, and comprises a plurality of functional devices electrically connected to the electrode layer.