Micro-LED Electrode Structure for Higher-Yield Display Repair
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Solution Overview
Problem
The productivity of display apparatuses using micro-semiconductor chips decreases as the size of the chips decreases and the size of the display apparatuses increases, leading to increased difficulty in repair processes.
Innovation Solution
A display apparatus is designed with a multilayer semiconductor layer including a first-type semiconductor layer, an active layer, and a second-type semiconductor layer, sequentially stacked on a first electrode, and an insulating layer with a specific angle to the semiconductor layer, allowing for improved yield and reduced defect rates in manufacturing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If micro-semiconductor chips are used to increase display resolution, then display quality is improved, but manufacturing productivity decreases
Solution Approach 1:
The patent segments the semiconductor chip structure into multiple layers (first-type semiconductor layer, active layer, second-type semiconductor layer) with specific functional zones. This segmentation allows for standardized mass production of each layer type while maintaining high-resolution capabilities, thereby improving manufacturing productivity without sacrificing display quality.
Solution Approach 2:
The patent changes the geometric parameters of the semiconductor chip structure by forming regions with different widths in the second direction. Specifically, the first region has a different width compared to the second region, which allows for optimized electrical characteristics and manufacturing yield. This parameter variation enables high-resolution displays while maintaining productive manufacturing processes.
2Quantity of substance
If micro-semiconductor chip size is decreased to increase display density, then display density is improved, but repair difficulty increases
Solution Approach 1:
The patent divides the semiconductor chip into functionally distinct segments with different width regions, allowing for modular replacement and repair. The segmented structure enables technicians to identify and replace specific faulty regions without needing to replace entire micro-chips, thereby maintaining high display density while improving ease of repair.
Solution Approach 2:
The patent implements local quality variations by creating regions with different widths tailored to specific functional requirements. This local differentiation allows for targeted repair strategies where only affected local regions need to be addressed, reducing overall repair complexity despite high chip density.
3Reliability
If complex multilayer semiconductor structure is implemented to improve device performance, then device performance is improved, but manufacturing complexity increases
Solution Approach 1:
The patent manages manufacturing complexity by systematically varying geometric parameters (widths of different regions) rather than introducing additional material layers or complex structures. This parameter-based approach maintains device performance while simplifying the manufacturing process compared to true structural complexity.
Solution Approach 2:
The patent employs asymmetric width variations in different regions of the semiconductor chip. This asymmetric design optimizes device performance for specific functions while maintaining a relatively simple overall structure that is easier to manufacture compared to fully symmetric or uniformly complex designs.
Data Source
AI summary
Provided is a display apparatus including a display substrate, a first pad and a second pad, a first electrode on the first pad, a multilayer semiconductor layer including a first-type semiconductor layer, an active layer, and a second-type semiconductor layer on the first electrode, an insulating layer on the display substrate and adjacent to the first pad, the first electrode, and the multilayer semiconductor layer, a height of the insulating layer being lower than an upper surface of the multilayer semiconductor layer, and a second electrode on an upper surface of the multilayer semiconductor layer, an exposed lateral surface of the multilayer semiconductor layer, and a surface of the insulating layer, the second electrode connecting the second-type semiconductor layer and the second pad, an angle between the exposed lateral surface of the multilayer semiconductor layer and an upper surface of the insulating layer is 90 degrees or more.