Micro LED Passivation Layout for Lower Self-Assembly Process Error
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Solution Overview
Problem
Current display technologies, such as LCDs and OLEDs, face issues like slow response time and short lifespan, while micro LED displays with self-assembly methods struggle with process errors and increased complexity due to the need for precise placement of millions of semiconductor light emitting devices.
Innovation Solution
A fabrication method that extends the passivation layer to cover side and upper surfaces of semiconductor light emitting devices, excluding only the conductive electrodes, allowing for symmetric formation and reduced process steps, enabling efficient self-assembly and minimizing errors in the display device manufacturing process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the passivation layer is extended to cover side and upper surfaces of semiconductor light emitting devices, then manufacturing precision is improved, but device complexity increases
Solution Approach 1:
The passivation layer is segmented to cover only specific surfaces (side and upper surfaces) while deliberately excluding the conductive electrodes, creating a selective coverage pattern that protects the device structure without interfering with electrical connections
Solution Approach 2:
The passivation layer is formed in advance during the semiconductor device fabrication process, covering the side and upper surfaces before the self-assembly process, which eliminates the need for subsequent exposure processes and reduces manufacturing errors
2Productivity
If the passivation layer covers entire upper surface excluding only conductive electrodes, then the number of processes is reduced, but manufacturing precision requirements increase
Solution Approach 1:
The conductive electrodes are extracted from the coverage area of the passivation layer, creating a precise pattern where the passivation layer covers the entire upper surface except for the electrode regions, eliminating the need for additional exposure and alignment processes
Solution Approach 2:
The formation of the passivation layer is merged with the existing semiconductor device fabrication process, combining multiple functions (surface protection, electrode exposure, and structural definition) into a single process step that reduces overall manufacturing complexity
Data Source
Figure 1~2
Figure 3~5c
Figure 5d~5g
AI summary
The present disclosure relates to a display device and a fabrication method thereof, and more particularly, to a display device using a semiconductor light emitting device. An object of the present disclosure is to provide a fabrication method and structure for reducing a process error in fabricating a display device including semiconductor light emitting devices.