Slew-Rate Controlled Microphone Buffer for Low-Delay Output Timing
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Solution Overview
Problem
Digital microphone assemblies face challenges in reducing propagation delay and controlling output rise and fall times across various load conditions, which affects their ability to operate at higher clock rates and is compounded by electromagnetic interference issues.
Innovation Solution
A slew-rate controlled output buffer circuit with capacitive feedback and a push-pull CMOS driver configuration, enabling independent rise and fall times that are not affected by process, voltage, temperature variations, or load capacitance, and incorporating power-saving features to reduce quiescent current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If conventional output buffer circuits are used, then the circuit structure is simple, but propagation delay is high and rise/fall times cannot be controlled across varying load conditions
Solution Approach 1:
The patent implements dynamic slew rate control by making the current sources adjustable based on operating conditions. The circuit transitions from static to dynamic operation by controlling the current magnitude through control voltages, allowing the buffer to adapt its switching characteristics in real-time to minimize propagation delay while managing complexity through controlled adaptability.
Solution Approach 2:
The patent changes key electrical parameters (current magnitude, slew rate) to optimize buffer performance. By varying the current sources' output based on control signals, the circuit achieves reduced propagation delay and controlled rise/fall times. This parameter adjustment approach resolves the contradiction by making performance可调 (adjustable) rather than fixed, addressing both speed and complexity concerns.
2Productivity
If higher clock rates are achieved by reducing propagation delay, then productivity increases, but electromagnetic interference issues worsen due to faster edge rates
Solution Approach 1:
The patent employs dynamic slew rate control to adjust edge rates adaptively. By controlling the current magnitude dynamically, the circuit can optimize for speed when needed while limiting edge rates to reduce EMI when necessary. This dynamic adjustment capability allows the system to achieve higher effective clock rates without consistently generating problematic EMI, resolving the productivity-EMI contradiction.
Solution Approach 2:
The patent changes the slew rate parameter based on operating conditions to balance clock rate performance with EMI generation. By adjusting the current sources' output parameters, the circuit achieves faster switching when high productivity is needed while maintaining control over edge rates to limit EMI. This parameter control strategy enables the system to operate at higher clock rates without proportionally increasing EMI issues.
3Speed
If slew rate is increased to reduce propagation delay, then speed improves, but power consumption increases due to higher current requirements
Solution Approach 1:
The patent implements dynamic current control where the current magnitude is adjusted based on actual operating needs rather than being constantly high. The control circuitry modulates the current sources to provide high slew rate only when switching transitions require it, reducing average power consumption while maintaining switching speed performance when needed. This dynamic approach resolves the speed-power contradiction by making current usage conditional rather than continuous.
Solution Approach 2:
The patent employs periodic or pulsed current activation to achieve high switching speeds only when necessary. By controlling the current sources to activate during critical switching transitions and remain lower during stable states, the circuit maintains speed performance while reducing average power consumption. This periodic action strategy allows the buffer to achieve high slew rates on-demand without continuously consuming high power, resolving the contradiction between speed and energy usage.
Data Source
AI summary
A digital microphone or other sensor assembly includes a transducer and an electrical circuit including a slew-rate controlled output buffer configured to reduce propagation delay and maintain output rise and fall time independent of PVT variation and load capacitance. In some embodiments, the portions of the output buffer are selectably disabled to reduce power consumption without adversely substantially increasing propagation delay.